11AA010T-I/TT Microchip Technology, 11AA010T-I/TT Datasheet - Page 6

• Manufacturer Part Number: 11AA010T-I/TT
• Description: IC EEPROM 1KBIT 100KHZ SOT23-3
• Manufacturer: Microchip Technology

Specifications of 11AA010T-I/TT

• Memory Size: 1K (128 x 8)
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 100kHz
• Interface: UNI/O™ (Single Wire)
• Voltage - Supply: 1.8 V ~ 5.5 V
• Organization: 128 x 8
• Interface Type: Serial
• Maximum Clock Frequency: 100 KHz
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 50 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 11AA010T-I/TTTR

11AAXXX/11LCXXX
2.0
2.1
The 11XX family of serial EEPROMs support the
UNI/O
microcontrollers, including Microchip’s PIC
trollers, ASICs, or any other device with an available
discrete I/O line that can be configured properly to
match the UNI/O protocol.
The 11XX devices contain an 8-bit instruction register.
The devices are accessed via the SCIO pin.
Table 4-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSb first, LSb
last.
Data is embedded into the I/O stream through
Manchester encoding. The bus is controlled by a
master device which determines the clock period, con-
trols the bus access and initiates all operations, while
the 11XX works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is active.
FIGURE 2-1:
DS22067H-page 6
SCIO
®
I/O Control
Current-
Limited
Control
STATUS
FUNCTIONAL DESCRIPTION
Principles of Operation
Register
Slope
protocol. They can be interfaced with
Logic
Vcc
Vss
Memory
BLOCK DIAGRAM
Control
Logic
Dec
X
Y Decoder
Sense Amp.
R/W Control
Page Latches
HV Generator
EEPROM
®
Array
microcon-
Preliminary
 2010 Microchip Technology Inc.