MAX817MESA Maxim Integrated, MAX817MESA Datasheet - Page 11

• Manufacturer Part Number: MAX817MESA
• Description: Supervisory Circuits
• Manufacturer: Maxim Integrated
• Series: MAX817, MAX817L, MAX817M, MAX818, MAX818L, MAX818M, MAX819, MAX819L, MAX819Mr

Specifications of MAX817MESA

• Number Of Voltages Monitored: 1
• Monitored Voltage: 4.4 V
• Undervoltage Threshold: 4.25 V
• Overvoltage Threshold: 4.5 V
• Output Type: Active Low, Open Drain
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: Backup
• Power-up Reset Delay (typ): 280 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8 Narrow
• Chip Enable Signals: No
• Maximum Power Dissipation: 471 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: Yes
• Supply Current (typ): 11 uA
• Supply Voltage - Min: 0 V

Any time a reset is generated, the CE transmission gate
remains disabled and CE IN remains high impedance
(regardless of CE IN activity) for the reset timeout peri-
od. When the CE transmission gate is enabled, the
impedance of CE IN appears as a 40 resistor in series
with the load at CE OUT. The propagation delay
through the CE transmission gate depends on V
source impedance of the drive connected to CE IN,
and the loading on CE OUT (see Typical Operating
Characteristics). The CE propagation delay is produc-
tion tested from the 50% point on CE IN to the 50%
point on CE OUT using a 50
capacitance (Figure 7). For minimum propagation
delay, minimize the capacitive load at CE OUT and use
a low-output-impedance driver.
When the CE transmission gate is enabled, the imped-
ance of CE OUT is equivalent to a 40
with the source driving CE IN. In the disabled mode,
the transmission gate is off and an active pull-up con-
nects CE OUT to OUT (Figure 5). This pull-up turns off
when the transmission gate is enabled.
Figure 7. CE Propagation Delay Test Circuit
* C
AND SCOPE-PROBE CAPACITANCE.
L
INCLUDES LOAD CAPACITANCE, STRAY CAPACITANCE,
50
+5V Microprocessor Supervisory Circuits
Chip-Enable Output (MAX818)
______________________________________________________________________________________
50
BATT
CE IN
driver and a 50pF load
MAX818
+5V
V
GND
CC
CE OUT
resistor in series
CC
50pF
C
L
, the
*
The MAX817/MAX819 PFI input is compared to an inter-
nal reference. If PFI is less than the power-fail threshold
(V
intended for use as an undervoltage detector to signal a
failing power supply (Figure 8). However, the comparator
does not need to be dedicated to this function because it
is completely separate from the rest of the circuitry.
The power-fail comparator turns off and PFO goes low
when V
period (t
of V
parator is unused, connect PFI to ground and leave PFO
unconnected. PFO can be connected to MR on the
MAX819 so that a low voltage on PFI will generate a
reset (Figure 9). In this configuration, when the monitored
voltage causes PFI to fall below V
causing a reset to be asserted. Reset remains asserted
as long as PFO holds MR low, and for t
PFO pulls MR high when the monitored supply is above
the programmed threshold. When PFO is connected to
MR, it is not possible to enable the battery freshness
seal. Enabling the battery freshness seal requires MR to
be high or open. Once the battery freshness seal is
enabled, it is no longer affected by PFO’s connection to
MR.
Figure 8. Using the Power-Fail Comparator to Generate a
Power-Fail Warning
PFT
V
IN
PFI
), PFO goes low. The power-fail comparator is
(see Battery Freshness Seal section). If the com-
CC
RP
R1
R2
REGULATOR
), PFO is forced high, regardless of the state
falls below V
PFI
+5V
1.25V
MAX817
MAX819
V
CC
BATT
Power-Fail Comparator
RESET
PFO
. During the reset timeout
POWER-FAIL-WARNING TRIP VOLTAGE
(MAX817/MAX819)
PFT
V
WARN
, PFO pulls MR low,
RP
= 1.25
RESET
NMI
(200ms) after
(
R1 + R2
R2
P
)
11