DS1815R-5-U+ Maxim Integrated, DS1815R-5-U+ Datasheet - Page 10

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DS1815R-5-U+

Manufacturer Part Number
DS1815R-5-U+
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
DS1815r
Datasheet

Specifications of DS1815R-5-U+

Number Of Voltages Monitored
1
Monitored Voltage
0 V to 5.5 V
Undervoltage Threshold
2.98 V
Overvoltage Threshold
3.15 V
Output Type
Active Low, Push-Pull
Manual Reset
Not Resettable
Watchdog
No Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
250 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-23
Chip Enable Signals
No
Minimum Operating Temperature
- 40 C
Power Fail Detection
Yes
Supply Current (typ)
35 uA
Supply Voltage - Min
0 V
Part # Aliases
90-1815R+U05
µP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (t
SRT and ground. Calculate the reset timeout capacitor
as folllows:
with t
The watchdog timeout period is adjustable to accom-
modate a variety of µP applications. With this feature,
the watchdog timeout can be optimized for software
execution. The programmer can determine how often
the watchdog timer should be serviced. Adjust the
watchdog timeout period (t
ic value capacitor (C
Figure 5. MAX6752/MAX6753 Window Watchdog Diagram
10
RESET
RESET
RESET
WDI
WDI
WDI
______________________________________________________________________________________
RP
in seconds and C
RP
t
WDI
(c) NORMAL OPERATION (NO PULSING, OUTPUT STAYS HIGH)
t
WD1
) by connecting a capacitor (C
< t
WD1
(MAX) < t
(b) SLOW FAULT
(a) FAST FAULT
(MIN)
Applications Information
C
SRT
WDI
t
WDI
< t
SWT
= t
Selecting Reset/Watchdog
> t
WD2
WD2
RP
(MIN)
) between SWT and GND. For
SRT
(MAX)
/ (5.06 x 10
WD
in Farads.
) by connecting a specif-
Timeout Capacitor
6
)
SRT
) between
normal mode operation, calculate the watchdog time-
out capacitor as follows:
with t
For the MAX6752 and MAX6753 windowed watchdog
function, calculate the slow watchdog period, t
follows:
C
capacitor. Ceramic capacitors are recommended.
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervi-
sors are relatively immune to short-duration supply tran-
sients (glitches). The Maximum Transient Duration vs.
Reset Threshold Overdrive graph in the Typical
Operating Characteristics shows this relationship.
The area below the curves of the graph is the region
in which these devices typically do not generate a reset
pulse. This graph was generated using a falling pulse
applied to V
(V
(reset-threshold overdrive). As the magnitude of the tran-
sient increases (farther below the reset threshold), the
maximum allowable pulse width decreases. Typically, a
V
and lasts 50µs or less does not cause a reset pulse to be
issued.
Figure 6. Interfacing to Other Voltage Levels
CC
SRT
TH
) and ending below it by the magnitude indicated
transient that goes 100mV below the reset threshold
RP
and C
in seconds and C
MAX6747
MAX6749
MAX6451
MAX6753
CC
SWT
V
5V
CC
t
, starting above the actual reset threshold
C
WD2
RESET
N
must be a low-leakage (< 10nA) type
SWT
GND
= 0.65 x 10
= t
WD
SRT
100kΩ
/(5.06 x 10
in Farads.
Transient Immunity
9
x C
RESET
SWT
6
)
GND
3.3V
V
μP
CC
WD2
as

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