25LC160/P Microchip Technology, 25LC160/P Datasheet

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25LC160/P

Manufacturer Part Number
25LC160/P
Description
IC EEPROM 16KBIT 2MHZ 8DIP
Manufacturer
Microchip Technology
Datasheets

Specifications of 25LC160/P

Memory Size
16K (2K x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Memory Configuration
2K X 8 / 1K X 16
Ic Interface Type
SPI
Clock Frequency
2MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
25LC160/PR
25LC160/PR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
25LC160/P
Manufacturer:
MCP
Quantity:
170
Part Number:
25LC160/P
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
25LC160/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Features:
• Max. Clock 5 MHz
• Low-power CMOS Technology:
• 1024 x 8 through 32768 x 8-bit Organization
• Byte and Page-level Write Operations
• Self-timed Erase and Write Cycles (6 ms max.)
• Block Write Protection:
• Built-in Write Protection:
• Sequential Read
• High Reliability:
• Temperature Range Supported:
• Package is Pb-free and RoHS Compliant
Pin Function Table
© 2009 Microchip Technology Inc.
*25LCXXX is used in this document as a generic part number for the 25 series devices.
- Max. Write Current: 5 mA at 5.5V, 5 MHz
- Read Current: 5 mA at 5.5V, 5 MHz
- Standby Current: 10 μA at 5.5V
- Protect none, 1/4, 1/2 or all of array
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
- Endurance: >1M erase/write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
- Extended (H):
Name
HOLD
SCK
V
V
WP
8K-256K SPI Serial EEPROM High Temp Family Data Sheet
CS
SO
SI
CC
SS
Chip Select Input
Serial Data Output
Write-Protect
Ground
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
-40°C to +150°C
Function
Preliminary
Description:
Microchip Technology Inc. 25LCXXX* devices are Mid-
density 8 through 256 Kbit Serial Electrically Erasable
PROMs (EEPROM). The devices are organized in
blocks of x8-bit memory and support the Serial Periph-
eral Interface (SPI) compatible serial bus architecture.
Byte-level and page-level functions are supported.
The bus signals required are a clock input (SCK) plus
separate data in (SI) and data out (SO) lines. Access to
the device is controlled through a Chip Select (CS)
input.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25LCXXX is available in a standard 8-lead SOIC
package. The package is Pb-free.
Package Types (not to scale)
25LC160C
25LC160D
25LC080C 25LC320A
25LC080D 25LC640A
V
WP
SO
CS
SS
1
2
3
4
SOIC
(SN)
8
7
6
5
V
HOLD
SCK
SI
CC
DS22131C-page 1
25LC128
25LC256

Related parts for 25LC160/P

25LC160/P Summary of contents

Page 1

... Description: Microchip Technology Inc. 25LCXXX* devices are Mid- density 8 through 256 Kbit Serial Electrically Erasable PROMs (EEPROM). The devices are organized in blocks of x8-bit memory and support the Serial Periph- eral Interface (SPI) compatible serial bus architecture. ...

Page 2

... DS22131C-page 2 Max Speed Page Size V Range CC (MHz) (Bytes) 2. 2. 2. 2. 2. 2. 2. 2. Preliminary © 2009 Microchip Technology Inc. Temp. Package Range ...

Page 3

... Microchip Technology Inc. † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...

Page 4

... Vcc < 4.5V(Note 1) 160 — ns 4.5V ≤ Vcc ≤ 5.5V 60 — ns 2.5V ≤ Vcc < 4.5V 160 — ns — (Note 2) 1,000,000 — E/W Page Mode, 25°C, V Cycles Preliminary V = 2.5V to 5.5V CC Test Conditions = 5.5V (Note 3) CC © 2009 Microchip Technology Inc. ...

Page 5

... TABLE 1-3: AC TEST CONDITIONS AC Waveform 0. – Timing Measurement Reference Level Input Output ≤ 4.0V Note 1: For For V > 4.0V CC © 2009 Microchip Technology Inc. — (Note 1) (Note 2) — Preliminary 25LCXXX DS22131C-page 5 ...

Page 6

... SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in High-Impedance SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI DS22131C-page High-Impedance n Don’t Care LSB in 14 Don’t Care Preliminary Mode 1,1 Mode 0,0 15 ISB out © 2009 Microchip Technology Inc. ...

Page 7

... STATUS register internal write cycle has already begun, WP going low will have no effect on the write. © 2009 Microchip Technology Inc. The WP pin function is blocked when the WPEN bit in the STATUS register is low. This allows the user to install the 25LCXXX in a system with WP pin grounded and still be able to write to the STATUS register ...

Page 8

... Reset the write enable latch (disable write operations) Set the write enable latch (enable write operations) Read STATUS register Write STATUS register Preliminary HV Generator EEPROM Memory X Array Control Logic Dec Page Latches Y Decoder Sense Amp. R/W Control CC SS © 2009 Microchip Technology Inc. ...

Page 9

... SI High-Impedance SO © 2009 Microchip Technology Inc. Once the write enable latch is set, the user may proceed by setting the CS low, issuing a WRITE instruc- tion, followed by the 16-bit address, and then the data to be written. Depending upon the density, a page of data that ranges from 16 bytes to 64 bytes can be sent to the device before a write cycle is necessary ...

Page 10

... FIGURE 3-2: BYTE WRITE SEQUENCE SCK Instruction High-Impedance SO FIGURE 3-3: PAGE WRITE SEQUENCE SCK Instruction SCK Data Byte DS22131C-page 16-bit Address 16-bit Address Data Byte Preliminary Twc Data Byte Data Byte Data Byte n (16/32/64 max © 2009 Microchip Technology Inc. ...

Page 11

... SO FIGURE 3-5: WRITE DISABLE SEQUENCE (WRDI) CS SCK SI SO © 2009 Microchip Technology Inc. The following is a list of conditions under which the write enable latch will be reset: • Power-up See • WRDI instruction successfully executed • WRSR instruction successfully executed • WRITE instruction successfully executed ...

Page 12

... WRSR instruction. These R R bits are nonvolatile, and are shown in Table 3-3. WEL WIP See Figure 3-6 for the RDSR timing sequence. ’, no write Data from STATUS Register Preliminary © 2009 Microchip Technology Inc. ...

Page 13

... SI SO Note: An internal write cycle (T sequence. © 2009 Microchip Technology Inc. The Write-Protect Enable (WPEN) bit is a nonvolatile bit that is available as an enable bit for the WP pin. The Write-Protect (WP) pin and the Write-Protect Enable (WPEN) bit in the STATUS register control the programmable hardware write-protect feature ...

Page 14

... The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • A high-to-low-level transition required to enter active state Protected Blocks Unprotected Blocks Protected x Protected x Protected Protected Preliminary STATUS Register Protected Protected Writable Writable Writable Protected Writable Writable © 2009 Microchip Technology Inc. ...

Page 15

... Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Note: Custom marking available. © 2009 Microchip Technology Inc. Example: 25LC32AH NNN ...

Page 16

... DS22131C-page 16 PP %RG\ >62,&@ α φ β Preliminary © 2009 Microchip Technology Inc. ...

Page 17

... Microchip Technology Inc. PP %RG\ >62,&@ Preliminary 25LCXXX DS22131C-page 17 ...

Page 18

... REVISION HISTORY Revision A (01/2009) Original Release. Revision B (04/2009) Revised part number from 25XX to 25LCXXX; Added Note 1 to Electrical Characteristics. Revision C (06/2009) Revised Features: Endurance and Package; Revised Table 1-2, Para. 21. DS22131C-page 18 Preliminary © 2009 Microchip Technology Inc. ...

Page 19

... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notifi- cation and follow the registration instructions. © 2009 Microchip Technology Inc. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...

Page 20

... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS22131C-page 20 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS22131C Preliminary © 2009 Microchip Technology Inc. ...

Page 21

... Byte Page, SPI Serial EEPROM Tape & Reel: Blank = Standard packaging T = Tape & Reel Temperature H = -40°C to+150°C Range: Package Plastic SOIC (3.90 mm body), 8-lead © 2009 Microchip Technology Inc. /XX X Examples: Package Preliminary 25LCXXX . 25LC080CT-H/SN = 8k-bit, 16-byte page, 2.5V Serial EEPROM, Extended temp., Tape & ...

Page 22

... NOTES: DS22131C-page 22 Preliminary © 2009 Microchip Technology Inc. ...

Page 23

... PICDEM, PICDEM.net, PICtail, PIC Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 24

... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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