IS61LF12836A-7.5TQLI ISSI, Integrated Silicon Solution Inc, IS61LF12836A-7.5TQLI Datasheet

IC SRAM 4MBIT 7.5NS 100TQFP

IS61LF12836A-7.5TQLI

Manufacturer Part Number
IS61LF12836A-7.5TQLI
Description
IC SRAM 4MBIT 7.5NS 100TQFP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet
1.IS61LF25618A-7.5TQLI.pdf (25 pages)

Specifications of IS61LF12836A-7.5TQLI

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
4M (128K x 36)
Speed
7.5ns
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Density
4Mb
Access Time (max)
7.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
117MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TQFP
Operating Temp Range
-40C to 85C
Number Of Ports
4
Supply Current
160mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Word Size
36b
Number Of Words
128K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
706-1091
IS61LF12836A-7.5TQLI

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
BOSTOCK HK LIMITED BOSTOCK HK LIMITED
Part Number:
IS61LF12836A-7.5TQLI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
Company:
BOSTOCK HK LIMITED BOSTOCK HK LIMITED
Part Number:
IS61LF12836A-7.5TQLI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
128K x 32, 128K x 36, 256K x 18 
4 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
• Burst sequence control using MODE input
• Three chip enable option for simple depth expan-
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• Power Supply
LF: V
• JEDEC 100-Pin TQFP, 119-pin PBGA, and 165-
• Automotive temperature available
• Lead-free available
FAST ACCESS TIME
 
Integrated Silicon Solution, Inc.
Rev.  F
09/28/2010
IS61(64)LF12832A  IS64VF12832A
IS61(64)LF12836A  IS61(64)VF12836A
IS61(64)LF25618A  IS61(64)VF25618A
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
control
sion and address pipelining
VF: V
pin PBGA packages
Symbol 
t
t
kq
kc
dd
dd
3.3V + 5%, V
2.5V -5% +10%, V
Parameter 
Clock Access Time
Cycle Time
Frequency
ddq
3.3V/2.5V + 5%
ddq
2.5V -5% +10%
DESCRIPTION
The
LF/VF12836A and IS61(64)LF/VF25618A are high-speed,
low-power synchronous static RAMs designed to provide
burstable, high-performance memory for communication
and networking applications. The IS61(64)LF12832A is
organized as 131,072 words by 32 bits. The IS61(64)LF/
VF12836A is organized as 131,072 words by 36 bits. The
IS61(64)LF/VF25618A is organized as 262,144 words by
18 bits. Fabricated with
ogy, the device integrates a 2-bit burst counter, high-speed
SRAM core, and high-drive capability outputs into a single
monolithic circuit. All synchronous inputs pass through
registers controlled by a positive-edge-triggered single
clock input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
Separate byte enables allow individual bytes to be written.
input pins. Subsequent burst addresses can be gener-
ated internally and controlled by the ADV (burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW. Interleave
to four bytes wide as controlled by the write control inputs.
Byte write operation is performed by using byte write en-
able (BWE) input combined with one or more individual
byte write signals (BWx). In addition, Global Write (GW)
is available for writing all bytes at one time, regardless of
the byte write controls.
Bursts can be initiated with either ADSP (Address Status
Processor) or ADSC (Address Status Cache Controller)
burst is achieved when this pin is tied HIGH or left floating.
-6.5 
133
6.5
7.5
ISSI
IS61(64)LF12832A, IS64VF12832A, IS61(64)
-7.5 
117
7.5
8.5
ISSI
's advanced CMOS technol-
Units
MHz
ns
ns
SEPTEBMER 2010
1

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IS61LF12836A-7.5TQLI Summary of contents

Page 1

... DESCRIPTION ISSI The IS61(64)LF12832A, IS64VF12832A, IS61(64) LF/VF12836A and IS61(64)LF/VF25618A are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications. The IS61(64)LF12832A is organized as 131,072 words by 32 bits. The IS61(64)LF/ VF12836A is organized as 131,072 words by 36 bits. The IS61(64)LF/VF25618A is organized as 262,144 words by 18 bits. Fabricated with ogy, the device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit ...

Page 2

... ADSC ADSP 17/ BWE BW(a-d) x18: a,b x32/x36: a-d CE CE2 CE2 POWER ZZ DOWN OE 2 MODE A0' Q0 CLK A0 BINARY COUNTER A1 CLR MEMORY ARRAY 15/16 17/ ADDRESS REGISTER CE CLK 32, 36 DQ(a-d) BYTE WRITE REGISTERS CLK 2/4/8 INPUT D Q REGISTERS ENABLE REGISTER CLK CE CLK 128Kx32; 128Kx36; ...

Page 3

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 165-PIN BGA 165-Ball, 13x15 mm BGA BOTTOM VIEW Integrated Silicon Solution, Inc. Rev.  F 09/28/2010 119-PIN BGA 119-Ball, 14x22 mm BGA BOTTOM VIEW 3 ...

Page 4

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 119 BGA PACKAGE PIN CONFIGURATION 128k 36 (TOP VIEW DDQ B NC CE2 DQc DQPc E DQc DQc F V DQc DDQ G DQc DQc H DQc DQc ...

Page 5

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 119 BGA PACKAGE PIN CONFIGURATION 256k 18 (TOP VIEW DDQ B NC CE2 DQb NC Vss E NC DQb Vss Vss ...

Page 6

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 165 PBGA PACKAGE PIN CONFIGURATION 128k 36 (TOP VIEW CE2 C DQPc NC V ddq D DQc DQc V ddq E DQc DQc V ddq F DQc ...

Page 7

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 165 PBGA PACKAGE PIN CONFIGURATION 256k 18 (TOP VIEW CE2 ddq D NC DQb V ddq E NC DQb V ddq F NC ...

Page 8

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A PIN CONFIGURATION 100-PIN TQFP (128K x 36) 100 DQPc 1 2 DQc 3 DQc 4 VDDQ VSS 5 6 DQc 7 DQc DQc ...

Page 9

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A PIN CONFIGURATION 100-PIN TQFP (256K x 18) 100 VDDQ 5 VSS ...

Page 10

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A TRUTH TABLE (1-8) OPERATION  ADDRESS  CE  Deselect Cycle, Power-Down None Deselect Cycle, Power-Down None Deselect Cycle, Power-Down None Deselect Cycle, Power-Down None Deselect Cycle, Power-Down None Snooze Mode, Power-Down None Read Cycle, Begin Burst External Read Cycle, Begin Burst External Write Cycle, Begin Burst External Read Cycle, Begin Burst External Read Cycle, Begin Burst External Read Cycle, Continue Burst Next Read Cycle, Continue Burst Next Read Cycle, Continue Burst Next Read Cycle, Continue Burst Next Write Cycle, Continue Burst Next ...

Page 11

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A INTERLEAVED BURST ADDRESS TABLE (MODE = V   External Address  1st Burst Address    A1  A0  A1  A0  LINEAR BURST ADDRESS TABLE (MODE = VSS) A1', A0' = 1,1       ABSOLUTE MAXIMUM RATINGS   Symbol  Parameter  T Storage Temperature sTg P Power Dissipation ...

Page 12

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A OPERATING RANGE (IS61/64LFxxxxx)   Range  Ambient Temperature  Commercial 0°C to +70°C Industrial -40°C to +85°C Automotive -40°C to +125°C OPERATING RANGE (IS61/64VFxxxxx)   Range  Ambient Temperature  Commercial 0°C to +70°C Industrial -40°C to +85°C Automotive -40°C to +125°C DC ELECTRICAL CHARACTERISTICS      Symbol  Parameter  Test Conditions    V Output HIGH Voltage Output LOW Voltage ...

Page 13

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A POWER SUPPLY CHARACTERISTICS       Symbol  Parameter  Test Conditions    Operating Device Selected ≤ V Supply Current All Inputs ≤ 0.2V or ≥ V Cycle Time ≥ Standby Current Device Deselected, sb TTL Input V ...

Page 14

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 3.3V I/O AC TEST CONDITIONS   Parameter    Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load AC TEST LOADS Z = 50Ω O OUTPUT Figure 1 14 Unit 0V to 3.0V 1.5 ns 1.5V See Figures 1 and 2 3.3V OUTPUT 50Ω 1.5V 317 Ω 351 Ω Including jig and scope Figure 2 Integrated ...

Page 15

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 2.5V I/O AC TEST CONDITIONS   Parameter    Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load See Figures 3 and 4 2.5V I/O OUTPUT LOAD EQUIVALENT Z = 50Ω O OUTPUT Figure 3 Integrated Silicon Solution, Inc. Rev.  F 09/28/2010 Unit 0V to 2.5V 1.5 ns 1.25V +2.5V OUTPUT 50Ω 1.25V 1,667 Ω Including 1,538 ...

Page 16

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A READ/WRITE CYCLE SWITCHING CHARACTERISTICS         Symbol  Parameter  fmax Clock Frequency t Cycle Time kc t Clock High Time kh t Clock Low Time kl t Clock Access Time kq t Clock High to Output Invalid (2) kqx t Clock High to Output Low-Z (2,3) kqlZ t Clock High to Output High-Z ...

Page 17

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A READ/WRITE CYCLE TIMING t CLK ADSP t SS ADSC ADV Address RD1 BWE BWd-BWa t t CES CEH CES CEH CE2 t ...

Page 18

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A WRITE CYCLE TIMING t CLK ADSP ADSC ADV must be inactive for ADSP Write ADV Address WR1 BWE t WS BWd-BWa WR1 t t CES ...

Page 19

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A SNOOZE MODE ELECTRICAL CHARACTERISTICS   Symbol  Parameter    I Current during SNOOZE MODE ZZ active to input ignored Pds t ZZ inactive to input sampled Pus t ZZ active to SNOOZE current ZZI t ZZ inactive to exit SNOOZE current rZZI SNOOZE MODE TIMING CLK t PDS ZZ setup cycle ZZ t ZZI Isupply I ...

Page 20

... DD DDq Order Part Number  IS61LF12832A-6.5TQ IS61LF12832A-6.5B2 IS61LF12832A-6.5B3 IS61LF12832A-7.5TQ IS61LF12832A-7.5B2 IS61LF12832A-7.5B3 IS61LF12836A-6.5TQ IS61LF12836A-6.5B2 IS61LF12836A-6.5B3 IS61LF12836A-7.5TQ IS61LF12836A-7.5B2 IS61LF12836A-7.5B3 IS61LF25618A-6.5TQ IS61LF25618A-6.5TQL IS61LF25618A-6.5B2 IS61LF25618A-6.5B3 IS61LF25618A-7.5TQ IS61LF25618A-7.5B2 IS61LF25618A-7.5B3 Package 100 TQFP 119 PBGA 165 PBGA 100 TQFP 119 PBGA 165 PBGA 100 TQFP 119 PBGA 165 PBGA 100 TQFP 119 PBGA ...

Page 21

... DD DDq Order Part Number  IS61LF12832A-6.5TQI IS61LF12832A-6.5B2I IS61LF12832A-6.5B3I IS61LF12832A-7.5TQI IS61LF12832A-7.5TQLI IS61LF12832A-7.5B2I IS61LF12832A-7.5B3I IS61LF12836A-6.5TQI IS61LF12836A-6.5TQLI IS61LF12836A-6.5B2I IS61LF12836A-6.5B3I IS61LF12836A-7.5TQI IS61LF12836A-7.5TQLI IS61LF12836A-7.5B2I IS61LF12836A-7.5B3I IS61LF25618A-6.5TQI IS61LF25618A-6.5B2I IS61LF25618A-6.5B3I IS61LF25618A-7.5TQI IS61LF25618A-7.5TQLI IS61LF25618A-7.5B2I IS61LF25618A-7.5B3I Order Part Number  IS64LF12832A-7.5TQA3 IS64LF12832A-7.5TQLA3 IS64LF12836A-7.5TQA3 IS64LF12836A-7.5B3LA3 IS64LF25618A-7.5TQA3 Package ...

Page 22

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A ORDERING INFORMATION (V Commercial Range: 0°C to +70°C   Configuration  Access Time  128Kx36 6.5 128Kx36 7.5 256Kx18 6.5 256Kx18 7.5 Industrial Range: -40°C to +85°C   Configuration  Access Time    128Kx36 6.5 ...

Page 23

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A Integrated Silicon Solution, Inc. Rev.  F 09/28/2010 23 ...

Page 24

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A 24 Integrated Silicon Solution, Inc. Rev.  F 09/28/2010 ...

Page 25

IS61(64)LF12832A, IS61(64)LF12836A, IS61(64)LF25618A IS64VF12832A,  IS61(64)VF12836A,  IS61(64)VF25618A Integrated Silicon Solution, Inc. Rev.  F 09/28/2010 25 ...

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