M45PE20-VMP6TG NUMONYX, M45PE20-VMP6TG Datasheet - Page 40

• Manufacturer Part Number: M45PE20-VMP6TG
• Description: IC FLASH 2MBIT 75MHZ 8VFQFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M45PE20-VMP6TG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VFQFN, 8-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M45PE20-VMP6TG; M45PE20-VMP6TGTR

DC and AC parameters
Table 15.
1. See
2. Details of how to find the technology process in the marking are given in AN1995, see also
3. t
4. Value guaranteed by characterization, not 100% tested in production.
5. Only applicable as a constraint for a WRSR instruction when SRWD is set to ‘1’.
6. When using PP and PW instructions to update consecutive bytes, optimized timings are obtained with one sequence
7.
40/47
Symbol
t
t
t
WHSL
SHWL
SHQZ
t
t
t
t
t
t
t
t
t
t
t
t
t
RDP
t
t
CHDX
CHSH
SHCH
PW
CH
SLCH
CHSL
DVCH
CLQV
CLQX
CL
SHSL
DP
PP
information.
including all the bytes versus several sequences of only a few bytes (1 ≤ n ≤ 256).
t
t
CH
int(A) corresponds to the upper integer part of A. For instance, int(12/8) = 2, int(32/8) = 4 int(15.3) =16.
t
f
f
PE
SE
W
C
R
(3)
(6)
(3)
(4)
(6)
(4)
+ t
(4)
(5)
(5)
Important note on page
CL
must be greater than or equal to 1/ f
t
t
t
t
t
Alt.
t
DSU
t
CSH
t
CLH
CSS
AC characteristics (75 MHz operation, T9HX (0.11 µm) process
CLL
DIS
HO
f
DH
t
C
V
Clock frequency for the following instructions:
FAST_READ, PW, PP, PE, SE, DP, RDP,
WREN, WRDI, RDSR, RDID
Clock frequency for read instructions
Clock High time
Clock Low time
Clock slew rate
S active setup time (relative to C)
S not active hold time (relative to C)
Data in setup time
Data in hold time
S active hold time (relative to C)
S not active setup time (relative to C)
S deselect time
Output disable time
Clock Low to Output valid
Output hold time
Write protect setup time
Write protect hold time
S to deep power-down
S High to standby mode
Write status register cycle time
Page write cycle time (256 bytes)
Page program cycle time (256 bytes)
Page program cycle time (n bytes)
Page erase cycle time
Sector erase cycle time
6.
Test conditions specified in
(4)
Parameter
(peak to peak)
C
.
Table 8
and
D.C.
D.C.
Min
100
100
0.1
20
6
6
5
5
2
5
5
5
0
Table 9
int(n/8) × 0.025
Section 12: Ordering
Typ
0.8
1.5
11
10
3
(1)
)
(2)
(7)
Max
75
33
30
15
23
20
8
8
3
3
5
M45PE20
MHz
MHz
Unit
V/ns
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
s