93AA56AT-I/OT Microchip Technology, 93AA56AT-I/OT Datasheet - Page 9

• Manufacturer Part Number: 93AA56AT-I/OT
• Description: IC EEPROM 2KBIT 2MHZ SOT23-6
• Manufacturer: Microchip Technology

Specifications of 93AA56AT-I/OT

• Memory Size: 2K (256 x 8)
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 1MHz, 2MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: SOT-23-6
• Memory Configuration: 256 X 8
• Ic Interface Type: Microwire
• Clock Frequency: 3MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOT-23
• No. Of Pins: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 93AA56AT-I/OT

2.6
The 93XX56A/B/C powers up in the Erase/Write
Disable (EWDS) state. All programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
FIGURE 2-5:
FIGURE 2-6:
2.7
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (if ORG pin is low or A-version
devices) or 16-bit (if ORG pin is high or B-version
FIGURE 2-7:
© 2008 Microchip Technology Inc.
CLK
CLK
CS
DO
CS
DI
CLK
DI
CS
DI
Erase/Write Disable and Enable
(EWDS/EWEN)
Read
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
High-Z
1
1
1
EWDS TIMING
EWEN TIMING
READ TIMING
1
0
0
0
0
0
A
N
0
1
•••
0
A0
1
0
Dx
x
x
•••
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
or Vcc is removed from the device.
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all erase/write
functions and should follow all programming opera-
tions. Execution of a READ instruction is independent of
both the EWEN and EWDS instructions.
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (T
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
•••
•••
D0
Dx
x
x
•••
T
T
PD
CSL
CSL
). Sequential read is possible when
D0
Dx
•••
DS21794F-page 9
D0