25LC512-E/SM Microchip Technology, 25LC512-E/SM Datasheet
25LC512-E/SM
Specifications of 25LC512-E/SM
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25LC512-E/SM Summary of contents
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... Temp. Ranges 128 Byte I,E Description: The Microchip Technology Inc. 25LC512 is a 512 Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase functions typically associated with Flash-based products. These functions are not required for byte or page write operations ...
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... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V .............................................................................................................................................................................6.5V CC All inputs and outputs w.r.t. V ......................................................................................................... -0. Storage temperature .................................................................................................................................-65°C to 150°C Ambient temperature under bias ...............................................................................................................-40°C to 125°C ESD protection on all pins ..........................................................................................................................................4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...
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... Byte or Page mode and Page Erase 25LC512 V = 2. 2.5V to 5.5V CC Conditions 5.5V (I) CC 5.5V ( 5.5V (I) CC 5.5V ( 5.5V (I) CC 5.5V ( 5.5V (I) CC ...
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... TABLE 1-2: AC CHARACTERISTICS (CONTINUED) AC CHARACTERISTICS Param. Sym. Characteristic No. 25 — Endurance Note 1: This parameter is periodically sampled and not 100% tested. 2: This parameter is not tested but established by characterization and qualification. For endurance estimates in a specific application, please consult the Total Endurance™ Model, which can be obtained from Microchip’ ...
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... SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI 2010 Microchip Technology Inc High-Impedance 14 Don’t Care 25LC512 High-Impedance Don’t Care LSB in 3 Mode 1,1 Mode 0,0 15 LSB out DS22065C-page 5 ...
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... CS goes low. If the clock line is shared with other peripheral devices on the SPI bus, the user can assert the HOLD input and place the 25LC512 in ‘HOLD’ mode. After releasing the HOLD pin, operation will resume from the point when the HOLD was asserted. ...
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... Read Sequence The device is selected by pulling CS low. The 8-bit READ instruction is transmitted to the 25LC512 fol- lowed by the 16-bit address. After the correct READ instruction and address are sent, the data stored in the memory at the selected address is shifted out on the SO pin. The data stored in the memory at the next ...
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... Write Sequence Prior to any attempt to write data to the 25LC512, the write enable latch must be set by issuing the WREN instruction (Figure 2-4). This is done by setting CS low and then clocking out the proper instruction into the 25LC512. After all eight bits of the instruction are trans- mitted, the CS must be brought high to set the write enable latch ...
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... FIGURE 2-3: PAGE WRITE SEQUENCE SCK Instruction SCK Data Byte 2010 Microchip Technology Inc 16-bit Address Data Byte 25LC512 Data Byte Data Byte n (128 max DS22065C-page 9 ...
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... Write Enable (WREN) and Write Disable (WRDI) The 25LC512 contains a write enable latch. Table 2-4 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. ...
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... X X BP1 BP0 W/R = writable/readable read-only. The Write-In-Process (WIP) bit indicates whether the 25LC512 is busy with a write operation. When set ‘ ’, a write is in progress, when set to a ‘ in progress. This bit is read-only. FIGURE 2-6: READ STATUS REGISTER TIMING SEQUENCE (RDSR) ...
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... Write Status Register Instruction (WRSR) The Write Status Register instruction (WRSR) allows the user to write to the nonvolatile bits in the STATUS register as shown in Table 2-2. The user is able to select one of four levels of protection for the array by writing to the appropriate bits in the STATUS register. ...
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... Microchip Technology Inc. 2.7 Power-On State The 25LC512 powers on in the following state: • The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • A high-to-low-level transition required to enter active state ...
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... A Write Enable (WREN) instruc- tion must be given prior to attempting a PAGE ERASE. This is done by setting CS low and then clocking out the proper instruction into the 25LC512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. ...
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... A Write Enable (WREN) instruction must be given prior to attempting a SECTOR ERASE. This is done by setting CS low and then clock- ing out the proper instruction into the 25LC512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. ...
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... A Write Enable (WREN) instruction must be given prior to executing a CHIP ERASE. This is done by setting CS low and then clocking out the proper instruction into the 25LC512. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch. ...
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... DEEP POWER-DOWN MODE Deep Power-Down mode of the 25LC512 is its lowest power consumption state. The device will not respond to any of the Read or Write commands while in Deep Power-Down mode, and therefore it can be used as an additional software write protection feature. The Deep Power-Down mode is entered by driving CS low, followed by the instruction code (Figure 2-11) onto the SI line, followed by driving CS high ...
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... RELEASE FROM DEEP POWER-DOWN AND READ ELECTRONIC SIGNATURE Once the device has entered Deep Power-Down mode all instructions are ignored except the Release from Deep Power-down and Read Electronic Signa- ture command. This command can also be used when the device is not in Deep power-down to read the ...
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... After power- up, a low level required prior to any sequence being initiated. 3.2 Serial Output (SO) The SO pin is used to transfer data out of the 25LC512. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock. 3.3 Write-Protect (WP) ...
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... Example: 25LC512I e SN 0728 3 1L7 Example: 25LC512 e I/SM 3 07281L7 Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) ...
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... PP %RG\ >')16@ 1RWH NOTE TOP VIEW A3 1RWHV 2010 Microchip Technology Inc EXPOSED PAD BOTTOM VIEW A A1 NOTE 2 25LC512 NOTE DS22065C-page 21 ...
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... DS22065C-page 22 2010 Microchip Technology Inc. ...
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... PLO %RG\ >3',3@ 1RWH N NOTE 1RWHV 2010 Microchip Technology Inc 25LC512 c DS22065C-page 23 ...
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... PP %RG\ >62,&@ 1RWH N NOTE 1RWHV DS22065C-page φ α c β 2010 Microchip Technology Inc. ...
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... PP %RG\ >62,&@ 1RWH 2010 Microchip Technology Inc. 25LC512 DS22065C-page 25 ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22065C-page 26 2010 Microchip Technology Inc. ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2010 Microchip Technology Inc. 25LC512 DS22065C-page 27 ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22065C-page 28 2010 Microchip Technology Inc. ...
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... Revision B (5/2008) Modified parameter D006 in Table 1-1; Revised Package Marking Information; Replaced Package Drawings; Revised Product ID section. Revision C (5/10) Revised Table 1-2, Param. No. 25 Conditions; Revised Section 2.2, added note; Updated SOIJ package drawings. 2010 Microchip Technology Inc. 25LC512 DS22065C-page 29 ...
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... NOTES: DS22065C-page 30 2010 Microchip Technology Inc. ...
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... Customers representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com 25LC512 should contact their distributor, DS22065C-page 31 ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 25LC512 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... Microchip Technology Inc. X /XX Examples: Package 25LC512 . 25LC512-I/SM = 512 Kbit, 2.5V Serial EEPROM, Industrial temp., SOIJ package 25LC512-I/P = 512 Kbit, 2.5V Serial EEPROM, Industrial temp., PDIP package 25LC512T-E/MF = 512 Kbit, 2.5V Serial EEPROM, Extended temp., Tape & Reel, DFN package DS22065C-page 33 ...
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... NOTES: DS22065C-page 34 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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