AT45D011-SI Atmel, AT45D011-SI Datasheet

IC FLASH 1MBIT 15MHZ 8SOIC

AT45D011-SI

Manufacturer Part Number
AT45D011-SI
Description
IC FLASH 1MBIT 15MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT45D011-SI

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
1M (512 pages x 264 bytes)
Speed
15MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT45D011SI
Features
Description
The AT45D011 is a 5.0-volt only, serial interface Flash memory suitable for in-system
reprogramming. Its 1,081,344 bits of memory are organized as 512 pages of 264
bytes each. In addition to the main memory, the AT45D011 also contains one SRAM
data buffer of 264 bytes. Unlike conventional Flash memories that are accessed
randomly with multiple address lines and a parallel interface, the DataFlash uses a
Pin Configurations
Note: PLCC package pins 16
and 17 are DON’T CONNECT
Pin Name
CS
SCK
SI
SO
WP
RESET
RDY/BUSY
Single 4.5V - 5.5V Supply
Serial Interface Architecture
Page Program Operation
Optional Page and Block Erase Operations
One 264-byte SRAM Data Buffer
Internal Program and Control Timer
Fast Page Program Time – 7 ms Typical
120 µs Typical Page to Buffer Transfer Time
Low Power Dissipation
15 MHz Max Clock Frequency
Hardware Data Protection Feature
Serial Peripheral Interface (SPI) Compatible – Modes 0 and 3
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
SCK
SO
NC
NC
NC
NC
NC
NC
– Single Cycle Reprogram (Erase and Program)
– 512 Pages (264 Bytes/Page) Main Memory
– 15 mA Active Read Current Typical
– 10 µA CMOS Standby Current Typical
SI
5
6
7
8
9
10
11
12
13
PLCC
Chip Select
Hardware Page
Write Protect Pin
Chip Reset
Ready/Busy
Function
Serial Clock
Serial Input
Serial Output
29
28
27
26
25
24
23
22
21
WP
RESET
RDY/BUSY
NC
NC
NC
NC
NC
NC
RDY/BUSY
RESET
GND
VCC
SCK
WP
SO
RESET
SCK
CS
SI
1
2
3
4
5
6
7
TSSOP Top View
1
2
3
4
SOIC
Type 1
8
7
6
5
SO
GND
VCC
WP
14
13
12
11
10
9
8
CS
NC
NC
NC
NC
NC
SI
(continued)
1-megabit
5.0-volt Only
Serial
DataFlash
AT45D011
Recommend using
AT45DB011B for new
designs.
AT45DB011
Preliminary 16-
Megabit 2.7-volt
Only Serial
DataFlash
Rev. 1123C–01/01
®
1

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AT45D011-SI Summary of contents

Page 1

... The AT45D011 is a 5.0-volt only, serial interface Flash memory suitable for in-system reprogramming. Its 1,081,344 bits of memory are organized as 512 pages of 264 bytes each. In addition to the main memory, the AT45D011 also contains one SRAM data buffer of 264 bytes. Unlike conventional Flash memories that are accessed ...

Page 2

... AT45D011 does not require high input voltages for programming. The device operates from a single power supply, 4.5V to 5.5V, for both the program and read opera- tions. The AT45D011 is enabled through the chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output (SO), and the Serial Clock (SCK) ...

Page 3

... To start a page read, the 8-bit opcode, 52H, is followed by 24 address bits and 32 don’t care bits. In the AT45D011, the first six address bits are reserved for larger density devices (see Notes on page 10), the next nine address bits (PA8- ...

Page 4

... When a low-to-high transition occurs on the CS pin, the part will first erase the selected page in main memory to all 1s and then program AT45D011 4 the data stored in the buffer into the specified page in the main memory. Both the erase and the programming of the ...

Page 5

... The nine most significant address bits (PA8-PA0) select the page in the main memory where data written, and the next nine address bits (BFA8-BFA0) select the first byte in the buffer to be written. After all address bits are shifted in, the part will take data from the SI pin and store it in the data buffer ...

Page 6

... The device density is indicated using bits 5, 4, and 3 of the status register. For the AT45D011, the three bits are 0, 0, and 1. The decimal value of these three binary bits does not equate to the device density; the three bits represent a ...

Page 7

... CC Condition CS, RESET all inputs at CMOS levels MHz mA; OUT CMOS levels CMOS levels I 2 -400 µ -100 µ 4. AT45D011 0°C to 70°C -40°C to 85°C 4.5V to 5.5V Min Typ Max 0.8 2.0 0.45 2.4 4.2 Units µ µA µ ...

Page 8

... Block Erase Time BE t RESET Pulse Width RST t RESET Recovery Time REC Input Test Waveforms and Measurement Levels 2.4V AC 2.0 DRIVING 0.8 LEVELS 0.45V < (10 AT45D011 8 Output Test Load AC MEASUREMENT LEVEL Min Typ Max 250 250 250 200 120 200 ...

Page 9

AC Waveforms Two different timing diagrams are shown below. Waveform 1 shows the SCK signal being low when CS makes a high- to-low transition, and Waveform 2 shows the SCK signal being high when CS makes a high-to-low transition. Both ...

Page 10

... Notes: 1. “r” designates bits reserved for larger densities recommended that “r” logical “0”. 3. For densities larger than 1M bit, the “r” bits become the most significant Page Address bit for the appropriate density. AT45D011 10 CMD 8 bits 8 bits ...

Page 11

... Write Operations The following block diagram and waveforms illustrate the various write sequences available. PAGE (264 BYTES) Main Memory Page Program through Buffer ···r , PA8-7 CMD Buffer Write CS SI CMD Buffer to Main Memory Page Program (Data from Buffer Programmed into Flash Page) ...

Page 12

... PA8-7 CMD SO Main Memory Page to Buffer Transfer (Data from Flash Page Read into Buffer Buffer Read Each transition represents 8 bits and 8 clock cycles AT45D011 12 FLASH MEMORY ARRAY MAIN MEMORY PAGE TO BUFFER BUFFER (264 BYTES) BUFFER READ I/O INTERFACE SO PA6-0, BA8 BA7-0 ...

Page 13

... Detailed Bit-level Read Timing – Inactive Clock Polarity Low Main Memory Page Read CS SCK 1 2 tSU COMMAND OPCODE Buffer Read CS SCK 1 2 tSU COMMAND OPCODE Status Register Read CS SCK 1 2 tSU HIGH-IMPEDANCE HIGH-IMPEDANCE HIGH-IMPEDANCE COMMAND OPCODE DATA OUT MSB DATA OUT ...

Page 14

... Detailed Bit-level Read Timing – Inactive Clock Polarity High Main Memory Page Read CS SCK 1 2 tSU COMMAND OPCODE Buffer Read CS SCK 1 2 tSU COMMAND OPCODE Status Register Read CS SCK tSU HIGH-IMPEDANCE SO AT45D011 HIGH-IMPEDANCE HIGH-IMPEDANCE COMMAND OPCODE DATA OUT MSB DATA OUT ...

Page 15

... PA8 X PA7 X PA6 X PA5 X PA4 X PA3 X PA2 X PA1 X PA0 BFA8 X BFA7 X BFA6 X BFA5 X BFA4 X BFA3 X BFA2 X BFA1 X BFA0 Main Memory Page Buffer to Buffer Compare Write 60H 84H PA8 X PA7 X PA6 X PA5 X PA4 X PA3 X PA2 X PA1 X PA0 X X BFA8 X BFA7 X BFA6 X BFA5 ...

Page 16

... PA8 PA8 PA7 PA7 PA6 PA6 PA5 PA5 PA4 PA4 PA3 PA3 PA2 PA2 PA1 PA1 PA0 PA0 AT45D011 16 Main Memory Page Block Page Program Erase Erase through Buffer Opcode 81H 50H PA8 PA8 PA7 PA7 PA6 PA6 PA5 PA5 PA4 ...

Page 17

... This type of algorithm is used for applications in which the entire array is programmed sequentially, filling the array page-by- page page can be written using either a Main Memory Page Program operation or a Buffer Write operation followed by a Buffer to Main Memory Page Program operation. 3. The algorithm above shows the programming of a single page. The algorithm will be repeated sequentially for each page within the entire array ...

Page 18

... See application note AN-4 (“Using Atmel’s Serial DataFlash”) for more details. Sector Addressing PA8 PA7 PA6 AT45D011 18 START provide address of page to modify MAIN MEMORY PAGE to BUFFER TRANSFER (53H) BUFFER WRITE (82H) BUFFER to MAIN MEMORY PAGE PROGRAM ...

Page 19

... Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) 14X 14-lead, 0.170" Wide, Plastic Thin Shrink Small Outline Package (TSSOP) Ordering Code AT45D011-JC AT45D011-SC AT45D011-XC AT45D011-JI AT45D011-SI AT45D011-XI Package Type Package Operation Range 32J Commercial 8S2 (0°C to 70°C) ...

Page 20

... REF 8 0.75 (.030) 0.45 (.018) *Controlling dimension: millimeters AT45D011 20 8S2, 8-lead, 0.210" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Dimensions in Inches and (Millimeters) .025(.635) X 30˚ - 45˚ .012(.305) .008(.203) .530(13.5) .490(12.4) ...

Page 21

... No licenses to patents or other intellectual prop- erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...

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