AT29LV020-12JC Atmel, AT29LV020-12JC Datasheet - Page 3

• Manufacturer Part Number: AT29LV020-12JC
• Description: IC FLASH 2MBIT 120NS 32PLCC
• Manufacturer: Atmel

Specifications of AT29LV020-12JC

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 120ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

3. Block Diagram
4. Device Operation
4.1
4.2
0565E–FLASH–9/08
Read
Software Data Protection Programming
The AT29LV020 is accessed like an EPROM. When CE and OE are low and WE is high, the
data stored at the memory location determined by the address pins is asserted on the outputs.
The outputs are put in the high impedance state whenever CE or OE is high. This dual-line con-
trol gives designers flexibility in preventing bus contention.
The AT29LV020 has 1024 individual sectors, each 256 bytes. Using the software data protec-
tion feature, byte loads are used to enter the 256 bytes of a sector to be programmed. The
AT29LV020 can only be programmed or reprogrammed using the software data protection fea-
ture. The device is programmed on a sector basis. If a byte of data within the sector is to be
changed, data for the entire 256-byte sector must be loaded into the device. The AT29LV020
automatically does a sector erase prior to loading the data into the sector. An erase command is
not required.
Software data protection protects the device from inadvertent programming. A series of three
program commands to specific addresses with specific data must be presented to the device
before programming may occur. The same three program commands must begin each program
operation. All software program commands must obey the sector program timing specifications.
Power transitions will not reset the software data protection feature, however the software fea-
ture will guard against inadvertent program cycles during power transitions.
Any attempt to write to the device without the 3-byte command sequence will start the internal
write timers. No data will be written to the device; however, for the duration of t
tion will effectively be a polling operation.
After the software data protection’s 3-byte command code is given, a byte load is performed by
applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high. The
address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by
the first rising edge of CE or WE.
The 256 bytes of data must be loaded into each sector. Any byte that is not loaded during the
programming of its sector will be erased to read FFH. Once the bytes of a sector are loaded into
the device, they are simultaneously programmed during the internal programming period. After
AT29LV020
WC
, a read opera-
3