CY7C09189-9AC Cypress Semiconductor Corp, CY7C09189-9AC Datasheet - Page 10

• Manufacturer Part Number: CY7C09189-9AC
• Description: IC SRAM 576KBIT 67MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09189-9AC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 576K (64K x 9)
• Speed: 67MHz
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1180

Switching Waveforms
Bank Select Pipelined Read
Left Port Write to Flow-Through Right Port Read
Notes:
Document #: 38-06039 Rev. *A
ADDRESS
18. In this depth expansion example, B1 represents Bank #1 and B2 is Bank #2; Each Bank consists of one Cypress dual-port device from this data sheet.
19. OE and ADS = V
20. The same waveforms apply for a right port write to flow-through left port read.
21. CE
22. OE = V
23. It t
ADDRESS
DATA
DATA
ADDRESS
ADDRESS
DATA
ADDRESS
valid until t
DATA
CCS
CE
CE
OUT(B2)
OUT(B1)
0
and ADS = V
CLK
CLK
R/W
CLK
R/W
OUTR
0(B1)
0(B2)
(B1)
IL
(B2)
INL
maximum specified, then data from right port READ is not valid until the maximum specified for t
for the right port, which is being read from. OE = V
L
R
R
R
CCS
L
L
L
(B1)
= ADDRESS
+ t
t
t
t
t
SA
SC
SA
SC
IL
CD1
IL
; CE
; CE
. t
1(B1)
t
t
CWDD
t
SW
1
SA
SD
, CNTEN, and CNTRST = V
A
A
0
, CE
0
(B2)
t
does not apply in this case.
CH2
MATCH
VALID
.
1(B2)
(continued)
[18, 19]
t
t
t
t
SW
SA
t
t
t
t
MATCH
CYC2
CCS
HA
HC
HA
HC
, R/W, CNTEN, and CNTRST = V
t
DC
t
CL2
t
t
t
t
HW
HA
t
HW
HA
HD
A
A
1
1
t
CWDD
IH
t
CD2
.
t
CD1
IH
[20, 21, 22, 23]
t
SC
for the left port, which is being written to.
D
t
0
SC
IH
A
A
.
2
2
t
t
DC
HC
t
HC
t
CD2
MATCH
VALID
NO
D
MATCH
A
A
1
3
t
NO
3
DC
t
t
CKLZ
CKHZ
t
t
CD2
DC
CWDD
. If t
t
CD1
CCS
D
A
A
4
2
>maximum specified, then data is not
4
t
t
t
CKHZ
CD2
CKLZ
CY7C09089/99
CY7C09189/99
D
3
Page 10 of 19
A
A
VALID
5
t
5
CKLZ
t
t
CKHZ
CD2
D
4