CY62256LL-55SNXI Cypress Semiconductor Corp, CY62256LL-55SNXI Datasheet - Page 2

• Manufacturer Part Number: CY62256LL-55SNXI
• Description: IC SRAM 256KBIT 55NS 28SOIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62256LL-55SNXI

• Format - Memory: RAM
• Memory Type: SRAM
• Memory Size: 256K (32K x 8)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Document #: 38-05248 Rev. *E
Product Portfolio
Pin Configurations
Pin Definitions
CY62256
CY62256L
CY62256LL
CY62256LL
CY62256LL
1–10, 21, 23–26
11–13, 15–19,
27
20
22
14
28
Note:
2. Typical specifications are the mean values measured over a large sample size across normal production process variations and are taken at nominal conditions
GND
(T
I/O 0
I/O 1
I/O 2
A 10
A 11
A 12
A 13
A 14
A 5
A 6
A 7
A 8
A 9
A
= 25°C, V
Pin Number
Narrow SOIC
13
14
1
2
3
4
5
6
7
8
9
10
11
12
Top View
Product
CC
). Parameters are guaranteed by design and characterization, and not 100% tested.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Commercial
Com’l / Ind’l
Commercial
Industrial
Automotive
I/O 3
V CC
WE
A 4
A 3
A 2
A 1
OE
A 0
CE
I/O 7
I/O 6
I/O 5
I/O 4
Input
Input/Output
Input/Control
Input/Control
Input/Control
Ground
Power Supply V
Type
Min.
GND
4.5
I/O 0
I/O 1
I/O 2
A 10
A 11
A 12
A 13
A 14
A 5
A 6
A 7
A 8
A 9
A
I/O
WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is
conducted
CE. When LOW, selects the chip. When HIGH, deselects the chip
OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins
behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input
data pins
GND. Ground for the device
13
14
CC
1
2
3
4
5
6
7
8
9
10
11
12
0
Top View
–A
0
–/O
DIP
. Power supply for the device
V
14
CC
Typ.
. Address Inputs
7
28
27
26
25
24
23
22
21
20
19
18
17
16
15
. Data lines. Used as input or output lines depending on operation
Range (V)
5.0
[2]
I/O 3
V CC
WE
A 4
A 3
A 2
A 1
OE
A 0
CE
I/O 7
I/O 6
I/O 5
I/O 4
Max.
5.5
V
WE
A
A
OE
V
A
A
WE
CC
A
A
A
A
A
A
A
A
A
OE
10
11
A
A
A
A
CC
A
A
A
A
A
11
10
1
2
3
4
5
6
7
8
9
9
8
7
6
5
4
3
2
1
Speed
Description
55/70
55/70
22
23
24
25
26
(ns)
4
5
6
7
27
28
1
2
3
26
25
24
23
22
70
55
7
6
5
4
70
3
2
1
28
27
Reverse Pinout
(not to scale)
(not to scale)
Top View
Top View
Typ.
TSOP I
Operating, I
TSOP I
28
25
25
25
25
[2]
(mA)
Power Dissipation
Max.
55
50
50
50
50
CC
10
11
12
13
14
15
16
17
18
19
20
21
21
20
19
18
17
16
15
14
13
12
11
10
8
9
9
8
A
CE
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
A
A
A
A
A
A
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
CE
A
0
14
13
12
12
13
14
0
Typ.
7
6
5
4
3
2
1
0
Standby, I
0
1
2
3
4
5
6
7
CY62256
0.1
0.1
0.1
1
2
Page 2 of 13
[2]
(µA)
Max.
SB2
50
10
15
5
5