M24256-BWMW6T STMicroelectronics, M24256-BWMW6T Datasheet
M24256-BWMW6T
Specifications of M24256-BWMW6T
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M24256-BWMW6T Summary of contents
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... More than 40-year data retention ■ Packages 2® – ECOPACK (RoHS compliant and halogen-free) February 2011 M24256-BF M24256-BR M24256-BW 256 Kbit serial I²C bus EEPROM Doc ID 6757 Rev 23 M24256-DR with three Chip Enable lines SO8 (MW) 208 mils width SO8 (MN) 150 mils width ...
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... Addressing the memory array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.6 Write operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.7 Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.8 Page Write (memory array 3.9 Write Identification Page (M24256-D only 3.10 Lock Identification Page (M24256-D only 3.11 ECC (error correction code) and write cycling . . . . . . . . . . . . . . . . . . . . . 16 3.12 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 3.13 Read operations ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 3.18 Reading the lock status (M24256-D only 3.19 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Doc ID 6757 Rev 23 Contents 3/42 ...
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... TSSOP8 – 8-lead thin shrink small outline, package mechanical data Table 21. UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead mm, data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Table 22. WLCSP 0.5 mm pitch, package mechanical data Table 23. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Table 24. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 4/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Doc ID 6757 Rev 23 ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. Package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. WLCSP connections (top view, marking side, with balls on the underside Figure 4. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Figure Fast mode (f C bus parasitic capacitance (C 2 Figure Fast mode Plus (f bus parasitic capacitance (C 2 Figure 7 ...
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... The Start condition is followed by a Device Select code and Read/Write bit (RW) (as described in Inside this Device Select code, the 4-bit device type identifier code is (1010) for the M24256- B and is (1011) for the M24256-D. When writing data to the memory, the device inserts an acknowledge bit during the 9 time, following the bus master’ ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Figure 2. Package connections 1. See Package mechanical data Figure 3. WLCSP connections (top view, marking side, with balls on the underside) Caution: As EEPROM cells loose their charge (and so their binary value) when exposed to ultra violet (UV) light, EEPROM dice delivered in wafer form or in WLCSP package by STMicroelectronics must never be exposed to UVlight ...
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... Control (WC) is driven High. When unconnected, the signal is internally read as V Write operations are allowed. When Write Control (WC) is driven High, device select and address bytes are acknowledged, Data bytes are not acknowledged. 8/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR indicates how the value of the pull-up resistor can be calculated M24xxx ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V Table 9). In order to secure a stable DC supply voltage recommended to decouple the ...
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... Figure Fast mode Plus (f bus parasitic capacitance (C 100 Bus line capacitor (pF) 10/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR = 400 kHz): maximum bus When time constant must be below the 400 ns time constant line represented on the left 100 1000 Bus line capacitor (pF) ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 2 Figure bus protocol SCL SDA SCL SDA Start condition SCL SDA Table 2. Most significant address byte b15 b14 Table 3. Least significant address byte b7 b6 SDA SDA Start Input Change condition MSB MSB b13 b12 b11 Doc ID 6757 Rev 23 ...
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... For correct device operation, Serial Data (SDA) must be stable during the rising edge of Serial Clock (SCL), and the Serial Data (SDA) signal must change only when Serial Clock (SCL) is driven Low. 12/42 M24256-BF, M24256-BR, M24256-BW, M24256- protocol. This is summarized in th ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 3.5 Addressing the memory array To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 4 (on Serial Data (SDA), most significant bit first). ...
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... Device operation Figure 8. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) 14/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Dev sel Byte addr Byte addr R/W ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 3.6 Write operations Following a Start condition the bus master sends a device select code with the Read/Write bit (RW) reset to 0. The device acknowledges this, as shown in address bytes. The device responds to each address byte with an acknowledge bit, and then waits for the data byte. ...
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... It is therefore recommended to write data by word (4 bytes) at address 4*N (where integer) in order to benefit from the larger amount of Write cycles. The M24256-Bx and M24256-DR devices are qualified at 1 million (1 000 000) Write cycles, using a cycling routine that writes to the device by multiples of 4-bytes. ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Figure 9. Write mode sequences with (data write enabled) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Data in N ...
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... Step 1. If the device has terminated the internal Write cycle, it responds with an Ack, indicating that the device is ready to receive the second part of the instruction (the first byte of this instruction having been sent during Step 1). 18/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Write cycle in progress Start condition ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 3.13 Read operations Read operations are performed independently of the state of the Write Control (WC) signal. After the successful completion of a Read operation, the device’s internal address counter is incremented by one, to point to the next byte address. Figure 11. Read mode sequences ...
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... Reading the Identification Page (M24256-D only) The Identification Page (64 bytes additional page which can be written and (later) permanently locked in Read-only mode. The Identification Page can be read by issuing a Read Identification Page instruction. This instruction uses the same protocol and format as the Random Address Read (from memory array) with device type identifier defined as 1011b ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 3.18 Reading the lock status (M24256-D only) The locked/unlocked status of the Identification page can be checked by transmitting a specific truncated command [Identification Page Write instruction + one data byte] to the device. The device will return an acknowledge bit if the Identification page is unlocked, otherwise a NoAck bit if the Identification page is locked ...
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... European directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment (RoHS) 2002/95/EC. 2. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114 100 pF 1500 500 ) 22/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Table 6 may cause permanent damage to Parameter Doc ID 6757 Rev 23 Min ...
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... M24256-BF, M24256-BR, M24256-BW, M24256- and AC parameters This section summarizes the operating and measurement conditions, and the dc and ac characteristics of the device. The parameters in the DC and AC characteristic tables that follow are derived from tests performed under the measurement conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters ...
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... Output low voltage OL 1. Characterized value, not tested in production. 2. The device is not selected after power-up, after a Read instruction (after the Stop condition), or after the completion of the internal write cycle t 24/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Input Levels Timing Reference Levels 0.8V CC 0.2V CC (1) ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Table 13. DC characteristics (voltage range W, device grade 6) Symbol Parameter Input leakage current I LI (SCL, SDA, E0, E1, Output leakage I LO current Supply current I CC (Read) Supply current I CC0 (Write) Standby supply I CC1 current Input low voltage V IL (SCL, SDA, WC) ...
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... If the application uses the voltage range R device with 2.5 V < V please refer to Table 13 2. Characterized value, not tested in production 3. The device is not selected after power-up, after a Read instruction (after the Stop condition), or after the completion of the internal write cycle t 26/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR (1) Test conditions to those in Table 8 Table 10) ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Table 15. DC characteristics (voltage range F) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
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... SCL) required by the SDA bus line to reach either 0.3V CLQV 0.7V , assuming that Characterized only, not tested in production. 28/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Test conditions specified in tables 7, 8, Parameter Clock frequency Clock pulse width high Clock pulse width low SDA (out) fall time Input signal rise time ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Table 17. 1 MHz AC characteristics Symbol Alt SCL t t CHCL HIGH t t CLCH LOW t t XH1XH2 XL1XL2 F ( QL1QL2 DXCX SU:DAT t t CLDX HD:DAT ( CLQX DH ( CLQV CHDL SU:STA t t DLCL HD:STA t t CHDH SU:STO t t DHDL BUF ( Only new devices identified by the process letter K are qualified at 1 MHz (refer to TN0440 for more). ...
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... DC and AC parameters Figure 13. AC waveforms 30/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Doc ID 6757 Rev 23 ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 7 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. Figure 14. SO8W – 8-lead plastic small outline, 208 mils body width, package outline 1 ...
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... SO8N – 8-lead plastic small outline, 150 mils body width, package mechanical data Symbol ccc Values in inches are converted from mm and rounded to 4 decimal digits. 32/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR A ccc millimeters Typ Min Max 1.75 0.1 0.25 1.25 0.28 0.48 ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Figure 16. TSSOP8 – 8-lead thin shrink small outline, package outline Drawing is not to scale. Table 20. TSSOP8 – 8-lead thin shrink small outline, package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits millimeters ...
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... (2) ddd 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. 34/42 M24256-BF, M24256-BR, M24256-BW, M24256- ddd A1 millimeters Typ Min Max 0.55 0.45 0.6 0.02 0 0.05 ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR Figure 18. WLCSP, 0.5 mm pitch, package outline Drawing is not to scale. Table 22. WLCSP 0.5 mm pitch, package mechanical data Symbol A 0.60 A1 0.245 A2 0.355 B D 1.97 E 1.785 e 0.5 e1 0.866 e2 0.25 e3 0.433 F 0.552 G 0.392 ( Preliminary data. 2. Values in inches are converted from mm and rounded to 4 decimal digits. ...
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... Reliability Certified Flow (HRCF) is described in the quality note QNEE9801. Please ask your nearest ST sales office for a copy. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 36/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR M24256–B W (1) Doc ID 6757 Rev 23 ...
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... M24256-BF, M24256-BR, M24256-BW, M24256-DR 9 Revision history Table 24. Document revision history Date Revision 29-Jan-2001 10-Apr-2001 16-Jul-2001 02-Oct-2001 13-Dec-2001 12-Jun-2001 22-Oct-2003 02-Sep-2004 22-Feb-2005 Lead Soldering Temperature in the Absolute Maximum Ratings table amended Write Cycle Polling Flow Chart using ACK illustration updated 1.1 LGA8 and SO8(wide) packages added ...
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... R) Note 1 removed from Table 13: DC characteristics (voltage range SO8W package specifications modified in data. Table 25: Available M24256-BR, M24256-BW, M24256-BF products (package, voltage range, temperature grade) M24512-x products (package, voltage range, temperature grade) Section 2.5: V ground added. Small text changes. ...
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... C Fast mode Plus (f 10 bus parasitic capacitance (C Caution removed in Section 3.11: ECC (error correction code) and write cycling. M24512-W and M24256-BW offered in the device grade 3 option (automotive temperature range): – Table 7: Operating conditions (voltage range – Table 13: DC characteristics (voltage range – ...
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... XH1XH2 XL1XL2 – Notes modified Figure 13: AC waveforms Section 3.9: Write Identification Page (M24256-D only) 18 corrected.Section 3.17: Reading the Identification Page (M24256-D only) clarified. UFDFPN8 package is now offered (see data, Table 23: Ordering information scheme 19 M24256-BR, M24256-BW, M24256-BF products (package, voltage range, temperature grade) ...
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... Moved: – Table 2: Most significant address byte Deleted: – Table 3: Device select code to access the Identification page (M24256- DR only) – Table 25: Available M24256-BR, M24256-BW, M24256-BF products (package, voltage range, temperature grade) – Table 26: Available M24256-DR products (package, voltage range, temperature grade) ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 42/42 M24256-BF, M24256-BR, M24256-BW, M24256-DR Please Read Carefully: © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies www ...