MD5811-D256-V3Q18-P SanDisk, MD5811-D256-V3Q18-P Datasheet - Page 49

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MD5811-D256-V3Q18-P

Manufacturer Part Number
MD5811-D256-V3Q18-P
Description
IC MDOC P3 256MB 48-TSOP
Manufacturer
SanDisk
Datasheet

Specifications of MD5811-D256-V3Q18-P

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
256M (32M x 8)
Speed
55ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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8.8
Description:
Address (hex): 100C/1072
Note: The DiskOnChip Control Confirmation register is write only
46
Read/Write
Description
Reset Value
Bit No.
1-0
7-5
2
3
4
DiskOnChip Control Register/Control Confirmation Register
Mode. These bits select the mode of operation, as follows:
00: Reset
01: Normal
10: Deep Power-Down
MDWREN (Mode Write Enable). This bit must be set to 1 before changing the mode of
operation. It always returns 0 when read.
BDET (Boot Detect). This bit is set whenever the device has entered Reset mode as a
result of the Boot Detector triggering. It is cleared by writing a 1 to this bit.
RST_LAT (Reset Latch). This bit is set whenever the device has entered the Reset mode
as a result of the RSTIN# input signal being asserted or the internal voltage detector
triggering. It is cleared by writing a 1 to this bit.
Reserved for future use.
These two registers are identical and contain information about the Mobile
DiskOnChip P3 operational mode. After writing the required value to the
DiskOnChip Control register, the complement of that data byte must also be
written to the Control Confirmation register. The two writes cycles must not be
separated by any other read or write cycles to the Mobile DiskOnChip P3
memory space, except for reads from the Programmable Boot Block space.
Bit 7
0
Mode[1:0]
Bit 6
0
MDWREN
Bit 5
R/W
Data Sheet, Rev. 0.3
0
BDET
Bit 4
Description
0
RST_LAT
Bit 3
1
Bit 2
0
RFU_0
Bit 1
Mobile DiskOnChip P3
R
0
93-SR-009-8L
Bit 0
0

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