CAT93C57XI ON Semiconductor, CAT93C57XI Datasheet - Page 7

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CAT93C57XI

Manufacturer Part Number
CAT93C57XI
Description
IC EEPROM 2KBIT 2MHZ 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT93C57XI

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8 or 128 x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
93C57XI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT93C57XI
Manufacturer:
ON Semiconductor
Quantity:
95
Read
(clocked into the DI pin), the DO pin of the CAT93C56/57
will come out of the high impedance state and, after sending
an initial dummy zero bit, will begin shifting out the data
addressed (MSB first). The output data bits will toggle on
the rising edge of the SK clock and are stable after the
specified time delay (t
shifted out and CS remains asserted with the SK clock
continuing to toggle, the device will automatically
increment to the next address and shift out the next data word
in a sequential READ mode. As long as CS is continuously
asserted and SK continues to toggle, the device will keep
incrementing to the next address automatically until it
reaches to the end of the address space, then loops back to
address 0. In the sequential READ mode, only the initial
Upon receiving a READ command and an address
For the CAT93C56/57, after the initial data word has been
DO
SK
CS
SK
CS
DI
DI
1
1
PD0
1
0
or t
0
0
PD1
* ENABLE = 11
HIGH−Z
DISABLE = 00
).
A
N
*
Figure 4. EWEN/EWDS Instruction Timing
A
N−1
Figure 3. READ Instruction Timing
t
Dummy 0
PD0
http://onsemi.com
A
0
7
data word is preceeded by a dummy zero bit. All subsequent
data words will follow without a dummy zero bit. The
READ instruction timing is illustrated in Figure 3.
Erase/Write Enable and Disable
Any writing after power−up or after an EWDS (erase/write
disable) instruction must first be preceded by the EWEN
(erase/write enable) instruction. Once the write instruction
is enabled, it will remain enabled until power to the device
is removed, or the EWDS instruction is sent. The EWDS
instruction can be used to disable all CAT93C56/57 write
and erase instructions, and will prevent any accidental
writing or clearing of the device. Data can be read normally
from the device regardless of the write enable/disable status.
The EWEN and EWDS instructions timing is shown in
Figure 4.
D
or
D
15
7
The CAT93C56/57 powers up in the write disable state.
. . . D
. . . D
0
0
D
or
D
Address + 1 Address + 2 Address + n
15
7
. . . D
. . . D
Don’t Care
0
0
STANDBY
D
or
D
15
7
. . . D
. . . D
0
0
D
or
D
15
7
. . .
. . .

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