CAT93C76VI-GT3 ON Semiconductor, CAT93C76VI-GT3 Datasheet
CAT93C76VI-GT3
Specifications of CAT93C76VI-GT3
Related parts for CAT93C76VI-GT3
CAT93C76VI-GT3 Summary of contents
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... Connected bits (ORG pin at GND). Each register can be written (or read) serially by using the DI (or DO) pin. The CAT93C76 is manufactured using ON Semiconductor’s advanced CMOS EEPROM floating gate technology. The device is designed to endure 1,000,000 program/erase cycles and has a data retention of 100 years. The device is available in 8− ...
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Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Temperature Under Bias Storage Temperature Voltage on any Pin with Respect to Ground (Note 1) V with Respect to Ground CC Lead Soldering Temperature (10 seconds) Output Short Circuit Current (Note 2) Stresses exceeding ...
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Table 5. INSTRUCTION SET (Note 6) Start Bit Instruction Opcode READ 1 10 ERASE 1 11 WRITE 1 01 EWEN 1 00 EWDS 1 00 ERAL 1 00 WRAL Address bit A10 for the 1,024x8 org. and ...
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... The ready/busy status of the CAT93C76 can be determined by selecting the device and polling the DO pin. Since this device features Auto−Clear before write NOT necessary to erase a memory location before it is written into ...
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HIGH− N−1 0 Dummy 0 Address + 1 Address + 2 Address + ...
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... SK pin is not necessary after the device has entered the self clocking mode. The ready/busy status of the CAT93C76 can be determined by selecting the device and polling the DO pin not necessary for all memory locations to be cleared before the WRAL command is executed. ...
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ENABLE = 11 DISABLE = HIGH− Figure 6. EWEN/EWDS Instruction Timing ...
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PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL ...
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PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...
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E1 e TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...
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D PIN#1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A3 0.20 REF b 0.23 0.30 D 2.90 3.00 D2 2.20 −−− E 2.90 3.00 E2 1.40 −−− e 0.65 TYP L 0.20 0.30 Notes: ...
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... The standard lead finish is NiPdAu. 12. The device used in the above example is a CAT93C76VI−GT3 (SOIC, Industrial Temperature, NiPdAu, Tape & Reel, 3,000 / Reel). 13. Product die revision letter is marked on top of the package as a suffix to the production date code (e.g., AYWWA). For additional information, please contact your ON Semiconductor sales office ...