NCP1200P100G ON Semiconductor, NCP1200P100G Datasheet - Page 8

IC CTRLR PWM CM 8DIP

NCP1200P100G

Manufacturer Part Number
NCP1200P100G
Description
IC CTRLR PWM CM 8DIP
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1200P100G

Output Isolation
Isolated
Frequency Range
86 ~ 116kHz
Voltage - Input
11.4 ~ 16 V
Operating Temperature
-25°C ~ 150°C
Package / Case
8-DIP (0.300", 7.62mm)
Number Of Pwm Outputs
1
On/off Pin
No
Adjustable Output
No
Topology
Flyback/Forward
Switching Freq
103KHz
Duty Cycle
80%
Operating Supply Voltage (max)
16V
Output Current
250A
Synchronous Pin
No
Rise Time
67ns
Fall Time
28ns
Mounting
Through Hole
Pin Count
8
Package Type
PDIP
Number Of Outputs
1
Duty Cycle (max)
80 % (Typ)
Mounting Style
Through Hole
Switching Frequency
103 KHz (Typ)
Operating Supply Voltage
16 V
Maximum Operating Temperature
+ 150 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NCP1200P100GOS

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Skipping Cycle Mode
the output power demand drops below a given level. This is
accomplished by monitoring the FB pin. In normal
operation, pin 2 imposes a peak current accordingly to the
load value. If the load demand decreases, the internal loop
asks for less peak current. When this setpoint reaches a
determined level, the IC prevents the current from
decreasing further down and starts to blank the output
pulses: the IC enters the so−called skip cycle mode, also
named controlled burst operation. The power transfer now
depends upon the width of the pulse bunches (Figure 18 ).
Suppose we have the following component values:
Lp, primary inductance = 1 mH
F
Ip skip = 300 mA (or 350 mV / Rsense)
The theoretical power transfer is therefore:
10 ms over a recurrent period of 100 ms, then the total power
transfer is: 2.2 . 0.1 = 220 mW.
a look at the operation mode versus the FB level
immediately gives the necessary insight:
1
2
FB
SW
@ Lp @ Ip
The NCP1200 automatically skips switching cycles when
If this IC enters skip cycle mode with a bunch length of
To better understand how this skip cycle mode takes place,
3. Permanently force the V
, switching frequency = 48 kHz
an auxiliary winding. It will automatically
disconnect the internal startup source and the IC
will be fully self−supplied from this winding.
Again, the total power drawn from the mains will
significantly decrease. Make sure the auxiliary
voltage never exceeds the 16 V limit.
Figure 17. Feedback Voltage Variations
2
@ Fsw + 2.2 W
Normal Current Mode Operation
Ip
Skip Cycle Operation
min
= 350 mV / R
CC
sense
level above V
CCH
http://onsemi.com
with
4.8 V
3.8 V
1.4 V
8
default), the peak current cannot exceed 1 V/Rsense. When
the IC enters the skip cycle mode, the peak current cannot go
below Vpin1 / 4 (Figure 19). The user still has the flexibility
to alter this 1.4 V by either shunting pin 1 to ground through
a resistor or raising it through a resistor up to the desired
level.
When FB is above the skip cycle threshold (1.4 V by
Figure 19. The skip cycle takes place at low peak
currents which guarantees noise free operation
Figure 18. Output pulses at various power levels
Max Peak
Current
(X = 5 ms/div) P1<P2<P3
Skip Cycle
Current Limit
P1
P2
P3

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