NCP1379DR2G ON Semiconductor, NCP1379DR2G Datasheet
NCP1379DR2G
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NCP1379DR2G Summary of contents
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NCP1379 Quasi-Resonant Current-Mode Controller for High-Power Universal Off-line Supplies The NCP1379 hosts a high−performance circuitry aimed to powering quasi−resonant converters. Capitalizing on a proprietary valley−lockout system, the controller shifts gears and reduces the switching frequency as the power loading becomes ...
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HV −bulk NCP ZCD / OPP PIN FUNCTION DESCRIPTION Pin N5 Pin Name Function 1 ZCD Zero Crossing Detection Adjust the over power protection 2 FB Feedback pin 3 CS Current sense ...
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INTERNAL CIRCUIT ARCHITECTURE VDD Rpullup FB VDD ICt tpoint − Discharge − Vth ESD DRV 3 ms blanking end / 4 The 40 ms ...
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MAXIMUM RATINGS TABLE(S) Symbol V Maximum Power Supply voltage, VCC pin, continuous voltage CC(MAX) I Maximum current for VCC pin CC(MAX) V Maximum driver pin voltage, DRV pin, continuous voltage DRV(MAX) I Maximum current for DRV pin DRV(MAX) V Maximum ...
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ELECTRICAL CHARACTERISTICS 1 680 pF) For min/max values T CS fault T Symbol Parameter CURRENT COMPARATOR − CURRENT SENSE V Setpoint decrease for V OPP(MAX) ZCD V Threshold for immediate fault ...
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ELECTRICAL CHARACTERISTICS 1 680 pF) For min/max values T CS fault T Symbol Parameter FEEDBACK SECTION − FEEDBACK Valley threshold voltage where 1 valley ends and 2 H2D ...
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T , JUNCTION TEMPERATURE (°C) J Figure 3. V vs. Junction Temperature CC(on) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 −40 − ...
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T , JUNCTION TEMPERATURE (°C) J Figure 9. V vs. Junction Temperature ILIM 1.24 1.23 1.22 1.21 1.20 1.19 1.18 −40 −20 0 ...
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T , JUNCTION TEMPERATURE (°C) J Figure 15. V vs. Junction Temperature ZCD(th) 3.30 3.25 3.20 3.15 3.10 3.05 3.00 −40 − ...
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NCP1379 implements a standard architecture operating in quasi−resonant mode. Thanks to a proprietary circuitry, the controller valley−jumping instability and steadily locks out in selected valley as the power demand goes down. Once the ...
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NCP1379 has two operating mode: quasi−resonant operation and VCO operation for the frequency foldback. The operating mode is fixed by the FB voltage as portrayed by Figure 22: • Quasi−resonant operation occurs for FB voltage higher than 0.8 V (FB ...
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VDD Rpullup FB Vdd ICt Ct Ct setpoint ZCD 10 V Vth ESD DRV Laux As the output load decreases (FB voltage decreases the valleys are incremented from the first to the fourth. When the fourth valley is reached, if ...
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Figure 24. Output Load is Decreased from 2 0 120 Vdc Input Voltage http://onsemi.com 13 ...
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Figure 25. Zoom Valley Transition nd rd Figure 26. Zoom Valley Transition http://onsemi.com 14 ...
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Figure 28. Zoom 4: 4 Time Out In case of extremely damped free oscillations, the ZCD comparator can be unable to detect the valleys. To avoid such situation, NCP1379 integrates a Time Out function that acts as a substitute clock ...
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− Vth ES D leakage blanking 3 us pulse DRV 100 ns SS end 100 ns Figure 29. Time Out Circuit Figure 30. Time Out Case n51: the 3 http://onsemi.com VDD demag ...
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Figure 31. Time Out Case n52: the 3 VCO operation occurs for FB voltage lower than 0.8 V (FB decreasing), or lower than 1.4 V (FB increasing). This corresponds to low output power. During VCO operation, the switching frequency is ...
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Figure 33 shows the implementation of the fault timer. CS LEB1 R sen se FB/4 ZCD/OPP OPP Soft−start Laux LEB2 V CS(stop) When the current in the MOSFET is higher than “Max Ip” ...
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Figure 34. Auto−Recovery Overload Protection Chronograms The over power compensation is achieved by monitoring the signal on ZCD pin (pin 1). Indeed, a negative voltage applied on this pin directly affects the internal voltage reference setting the maximum peak current ...
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p,aux opu zcd IN + − opl OPP Where the auxiliary to primary turn ration: N p,aux / the DC input voltage the negative ...
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... BO 0.8 ( 120 * 40.3 kW −6 ( 120 * 0.8 ) 10x10 ORDERING INFORMATION Device NCP1379DR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ and the bulk DESIGN EXAMPLE R bol R + bou = ...
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... M S *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. The products described herein (NCP1379), may be covered by one or more of the following U.S. patents; 6,362,067 and 5,073,850. There may be other patents pending. ...