LTC6802IG-1#PBF Linear Technology, LTC6802IG-1#PBF Datasheet - Page 28

IC MONITOR BATT STACK MC 44-SSOP

LTC6802IG-1#PBF

Manufacturer Part Number
LTC6802IG-1#PBF
Description
IC MONITOR BATT STACK MC 44-SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC6802IG-1#PBF

Function
Battery Monitor
Battery Type
Lithium-Ion (Li-Ion)
Voltage - Supply
4 V ~ 50 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-SOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LTC6802-1
APPLICATIONS INFORMATION
Poll Interrupt Status (Level Polling)
FAULT PROTECTION
Overview
Care should always be taken when using high energy
sources such as batteries. There are numerous ways that
systems can be [mis-]configured that might affect a bat-
tery system during its useful lifespan. Table 13 shows the
Table 13. LTC6802-1 Failure Mechanism Effect Analysis
SCENARIO
Cell input open-circuit (random)
Cell input open-circuit (random)
Top cell input connection loss (V
Bottom cell input connection loss
(V
Disconnection of a harness
between a group of battery cells
and the IC (in a system of stacked
groups)
Data link disconnection between
stacked LTC6802-1 units.
Cell-pack integrity, break between
stacked units
Cell-pack integrity, break between
stacked units
Cell-pack integrity, break within
stacked unit
Cell-pack integrity, break within
stacked unit
28
)
1. Pull CSBI low
2. Send PLINT command byte
3. SDO output from bottom device pulled low if any device has an interrupt condition; otherwise, SDO high
4. Pull CSBI high to exit polling
+
) Power will come from highest connected cell input
EFFECT
Power-up sequence at IC inputs
Differential input voltage overstress
or via data port fault current
Power will come from lowest connected cell input or
via data port fault current
Loss of supply connection to the IC
Break of "daisy chain" communication (no stress
to ICs). Communication will be lost to devices
above the disconnection. The devices below the
disconnection are still able to communicate and
perform all functions, however, the polling feature is
disabled.
Daisy-chain voltage reversal up to full stack potential
during pack discharge
Daisy-chain positive overstress during charging
Cell input reverse overstress during discharge
Cell input positive overstress during charge
various situations that should be considered when plan-
ning protection circuitry. The first five scenarios are to be
anticipated during production and appropriate protection
is included within the LTC6802-1 device itself.
DESIGN MITIGATION
Clamp diodes at each pin to V
alternate power-path.
Zener diodes across each cell voltage input pair (within IC)
limits stress.
Clamp diodes at each pin to V
alternate power-path. Diode conduction at data ports will impair
communication with higher-potential units.
Clamp diodes at each pin to V
alternate power-path. Diode conduction at data ports will impair
communication with higher-potential units.
Clamp diodes at each pin to V
alternate power-path if there are other devices (which can
supply power) connected to the LTC6802-1. Diode conduction
at data ports will impair communication with higher-potential
units.
All units above the disconnection will enter standby mode
within 2 seconds of disconnect. Discharge switches are
disabled in standby mode.
Use series protection diodes with top-port I/O connections
(RS07J for up to 600V). Use isolated data link at bottom-most
data port.
Add redundant current path link
Add parallel Schottky diodes across each cell for load-path
redundancy. Diode and connections must handle full operating
current of stack, will limit stress on IC
Add SCR across each cell for charge-path redundancy. SCR
and connections must handle full charging current of stack, will
limit stress on IC by selection of trigger Zener
+
+
+
+
& V
& V
& V
& V
(within IC) provide
(within IC) provide
(within IC) provide
(within IC) provide an
68021fa

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