DS2703G+T&R Maxim Integrated Products, DS2703G+T&R Datasheet - Page 7

• Manufacturer Part Number: DS2703G+T&R
• Description: IC BATT AUTHENTICAT SHA-1 8-TDFN
• Manufacturer: Maxim Integrated Products

Specifications of DS2703G+T&R

• Function: Battery Authentication
• Battery Type: Lithium-Ion (Li-Ion)
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -20°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-TDFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SHA Computation
The variables A, B, C, D, E and constants H0, H1, H2, H3, and H4 are initialized as follows:
A
B
C
D
E
The final values of variables A, B, C, D, and E are generated by looping through the following set of computations
for t = 0 to 79 (discarding any carry-out). Finally, the H0-H4 constants are added to the A-E variables respectively,
which are then concatenated to form the 160-bit MAC, ABCDE.
for ( t = 0 to 79 )
{
}
160-bit MAC := (A+H0) | (B+H1) | (C+H2) | (D+H3) | (E+H4)
DS2703 AUTHENTICATION COMMANDS
WRITE CHALLENGE [0Ch]. This command writes 64 bits in the message block. The LSB of the 64-bit data can
begin immediately after the MSB of the command has been completed. If more than 8 bytes are written, the final
value in the challenge register will be indeterminate. The Compute MAC and Compute Next Secret (with or without
ROM ID) function commands clear the challenge value. Therefore the Write Challenge command must be issued
prior to every Compute MAC or Compute Next Secret command for reliable results.
NOTE: Immediately after power-up, a dummy Compute MAC command is required to initialize the DS2703. If the
dummy command is not issued, the first authentication attempt is computed using a challenge value of 0. When
issuing the dummy Compute MAC command, the command sequence can be terminated immediately following the
8th bit of the Compute MAC command byte. Waiting for the SHA-1 computation and reading the results back are
not required.
COMPUTE MAC WITHOUT ROM ID [36h]. This command initiates a SHA-1 computation on the 512 bit block
comprised of words W0 - W15. The 64-bit secret and the 64-bit challenge are loaded in the message block and the
space in the message reserved for the ROM ID is filled with logical 1's. The DS2703 pauses at least 100us after
receiving this command before MAC computation begins. This gives the host ample time to connect the DQ pin to
a low impedance node prior to the high current demand computation. The DQ pin must not fall below V
during the computation period, t
terminate the low source impedance mode). After the DQ pin has returned to normal impedance, the host must
write eight write zero time slots and then issue 160 read time slots to get the MAC. The 32-bit registers A, B, C, D,
and E are used during every cycle of the hash algorithm and their final values at calculation cycle t=79 are added
to the values H0-H4 and stored in registers A-E. The new word ABCDE is now the MAC. After issuing the
command and waiting a minimum of t
master secret and message digest response independent of the ROM ID.
COMPUTE MAC WITH ROM ID [35h]
This command is structured the same as the Compute MAC without ROM ID, except that the ROM ID is loaded to
the message block. Including the ROM ID unique to each DS2703 in the MAC computation allows the use of a
unique secret in each token and a master secret in the host device. See application note “White Paper 4”, available
at http://www.maxim-ic.com, for more information.
:=
:=
:=
:=
:=
TMP
E
D
C
B
A
67452301h
EFCDAB89h
98BADCFEh
10325476h
C3D2E1F0h
:=
:=
:=
:=
:=
:=
D
C
S
A
TMP
S
30
5
(A) + F
(B)
COMP
t
(B,C,D) + W
. The host must release the DQ pin for 1-Wire data communications (i.e.
COMP
H0
H1
H2
H3
H4
, the host reads the 20-byte
t
+ K
:=
:=
:=
:=
:=
t
+ E
7 of 20
67452301h
EFCDAB89h
98BADCFEh
10325476h
C3D2E1F0h
MAC.
This command allows the use of a
PULLUP_MIN