TC7129CPL Microchip Technology, TC7129CPL Datasheet - Page 11

IC ADC 4 1/2DGT LCD DVR 40-DIP

TC7129CPL

Manufacturer Part Number
TC7129CPL
Description
IC ADC 4 1/2DGT LCD DVR 40-DIP
Manufacturer
Microchip Technology
Datasheets

Specifications of TC7129CPL

Display Type
LCD
Configuration
7 Segment
Digits Or Characters
A/D 4.5 Digits
Current - Supply
800µA
Voltage - Supply
6 V ~ 12 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
Resolution (bits)
4.5bit
Input Channel Type
Differential
Data Interface
Parallel
Supply Current
800µA
Digital Ic Case Style
DIP
No. Of Pins
40
Operating Temperature Range
0°C To +70°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
TC7129CPLR
TC7129CPLR

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
TC7129CPL
Manufacturer:
Microchip Technology
Quantity:
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Part Number:
TC7129CPL
Manufacturer:
MICROCHIP
Quantity:
12 000
Figure 4-6:
4.5
For applications in which 3-1/2 digit (100 V) resolution
is sufficient, an RC oscillator is adequate. A recom-
mended value for the capacitor is 51 pF. Other values
can be used as long as they are sufficiently larger than
the circuit parasitic capacitance. The resistor value is
calculated as:
EQUATION 4-1:
For 120 kHz frequency and C = 51 pF, the calculated
value of R is 75 k . The RC oscillator and the crystal
oscillator circuits are shown in Figure 4-7.
Figure 4-7:
© 2006 Microchip Technology Inc.
V+
5 pF
RC Oscillator
1
1
120 kHz
1N4148
R =
75 k
5 k
Temperature Compensating Circuits.
Oscillator Circuits.
Freq * C
0.45
40
40
270 k
75 k
10 pF
39 k
51 pF
+
200 k
V+
TC7129
2
TC7129
2
19
36
V
DGND
TC7129
DISP
V–
V+
24
23
4.6
Two important techniques are used in the TC7129:
successive
Successive integration is a refinement to the traditional
dual-slope conversion technique.
4.7
A dual-slope conversion has two basic phases: inte-
grate and de-integrate. During the integrate phase, the
input signal is integrated for a fixed period of time; the
integrated voltage level is thus proportional to the input
voltage. During the de-integrate phase, the integrated
voltage is ramped down at a fixed slope, and a counter
counts the clock cycles until the integrator voltage
crosses zero. The count is a measurement of the time
to ramp the integrated voltage to zero and is, therefore,
proportional to the input voltage being measured. This
count can then be scaled and displayed as a measure-
ment of the input voltage. Figure 4-8 shows the phases
of the dual-slope conversion.
Figure 4-8:
The dual-slope method has a fundamental limitation.
The count can only stop on a clock cycle, so that mea-
surement accuracy is limited to the clock frequency. In
addition, a delay in the zero-crossing comparator can
add to the inaccuracy. Figure 4-9 shows these errors in
an actual measurement.
20 k
Time
39 k
18 k
Measuring Techniques
Dual-Slope Conversion
Integrate
integration
2N2222
19
36
Dual-Slope Conversion.
V
DGND
TC7129
DISP
and
V+
V–
De-integrate
24
23
digital
TC7129
DS21459D-page 11
auto-zeroing.
Zero
Crossing

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