CP2403-GM Silicon Laboratories Inc, CP2403-GM Datasheet - Page 76

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CP2403-GM

Manufacturer Part Number
CP2403-GM
Description
IC LCD DRIVER 32QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2403-GM

Package / Case
32-QFN
Display Type
LCD
Configuration
64 Segment
Interface
I²C, SMBus
Current - Supply
620µA
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Data Ram Size
256 B
Interface Type
I2C, SMBus
Maximum Clock Frequency
25 MHz
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1864-5

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2403-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
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Part Number:
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Manufacturer:
SILICON
Quantity:
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CP2400/1/2/3
11.2.4. Automatic Gain Control and SmaRTClock Bias Doubling
Automatic Gain Control allows the SmaRTClock oscillator to trim the oscillation amplitude of a crystal in order to
achieve the lowest possible power consumption. Automatic Gain Control automatically detects when the oscillation
amplitude has reached a point where it safe to reduce the drive current, therefore, it may be enabled during crystal
startup. It is recommended to enable Automatic Gain Control in any system which uses the SmaRTClock oscillator
in crystal mode.
Turning off Automatic Gain Control will allow the crystal drive strength after oscillation is started to remain at the
same level used for starting the crystal. This will result in increased power consumption, however the crystal will
have higher immunity against external factors.
Note: Automatic Gain Control may be turned on in self-oscillate mode to reduce the oscillation frequency and the supply cur-
The SmaRTClock Bias Doubling feature allows the self-oscillation frequency to be increased (almost doubled) and
allows a higher crystal drive strength in crystal mode. High crystal drive strength is recommended when using a
crystal with a high ESR and high loading capacitance. Table 11.3 shows a summary of the oscillator operating
modes and allowed operating conditions. SmaRTClock Bias Doubling is enabled by setting BIASX2 (RTC0XCN.5)
to 1.
76
Mode
Crystal
Self-Oscillate
rent.
Table 11.3. SmaRTClock Bias Settings and Allowed Operating Conditions
Bias Double On, AGC On
Bias Double Off, AGC On
Bias Double Off, AGC Off
Bias Double On, AGC Off
Bias Double Off
Bias Double On
Setting
Rev. 1.0
Consumption
Highest
Lowest
Power
High
High
Low
Low
debugging purposes due to its increased
This mode is only recommended for
Allowed Operating Condition
ESR < 50 k, Cload < 10 pF
ESR < 80 k, Cload < 10 pF
ESR < 80 k, Cload < 10 pF
ESR < 80 k, Cload < 8 pF
ESR < 50 k, any load
ESR < 40 k, any load
power consumption.
20 kHz
40 kHz

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