MAX6956ATL+T Maxim Integrated Products, MAX6956ATL+T Datasheet - Page 21

• Manufacturer Part Number: MAX6956ATL+T
• Description: IC DRVR DSPL LED 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX6956ATL+T

• Display Type: LED
• Interface: I²C
• Current - Supply: 180µA
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Number Of Segments: 28
• Low Level Output Current: 18 mA
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Supply Current: 230 uA
• Maximum Power Dissipation: 2105 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Configuration: -
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Details

Table 15. Transition Detection Mask Register
Table 16. Display Test Register
X = Don’t care bit
segment drivers at full current. On a 3.3V supply, a
MAX6956 dissipates (3.3V - 2.4V)
when driving 28 of these 2.4V forward-voltage drop
LEDs at full current. This dissipation is within the ratings
of the 36-pin SSOP package with an ambient tempera-
ture up to +98°C. If a higher supply voltage is used or
the LEDs used have a lower forward-voltage drop than
2.4V, the MAX6956 absorbs a higher voltage, and the
MAX6956’s power dissipation increases.
If the application requires high drive current and high
supply voltage, consider adding a series resistor to
each LED to drop excessive drive voltage off-chip. For
example, consider the requirement that the MAX6956
must drive LEDs with a 2.0V to 2.4V specified forward-
voltage drop, from an input supply range is 5V ±5%
with a maximum LED current of 20mA. Minimum input
supply voltage is 4.75V. Maximum LED series resistor
value is (4.75V - 2.4V - 0.6V)/0.020A = 87.5Ω. We
choose 82Ω ±2%. Worst-case resistor dissipation is at
maximum toleranced resistance, i.e., (0.020A)

per LED is at maximum input supply voltage, minimum
toleranced resistance, minimum toleranced LED for-
ward-voltage drop, i.e., 0.020 x (5.25V - 2.0V - (0.020A

pation is 920mW driving all 28 LEDs at 20mA full cur-
rent at once, which meets the 941mW dissipation
ratings of the 36-pin SSOP package.
* INT is automatically cleared after it is read.
1.02) = 34mW. The maximum MAX6956 dissipation
82Ω x 0.98)) = 32.86mW. Worst-case MAX6956 dissi-
FUNCTION
Register
Display Test Mode
Normal Operation
Mask
MODE
28-Port LED Display Driver and I/O Expander
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
REGISTER
ADDRESS
______________________________________________________________________________________
(HEX)
0x06
ADDRESS CODE
READ/
WRITE
Read
Write
(HEX)
0x07
0x07

672mA = 0.6W
Unchanged
INT Status*
D7
2

D7
X
X
(82Ω
mask
Port
D6
30
D6
X
X
The MAX6956 operates down to 2V supply voltage
(although the sourcing and sinking currents are not guar-
anteed), providing that the MAX6956 is powered up ini-
tially to at least 2.5V to trigger the device’s internal reset.
When a MAX6956 register is written through the I
face, the register is updated on the rising edge of SCL
during the data byte’s acknowledge bit (Figure 5). The
delay from the rising edge of SCL to the internal register
being updated can range from 50ns to 350ns.
Ensure that all of the MAX6956 GND connections are
used. A ground plane is not necessary, but may be useful
to reduce supply impedance if the MAX6956 outputs are
to be heavily loaded. Keep the track length from the ISET
pin to the R
GND end of the resistor either to the ground plane or
directly to the GND pins.
The MAX6956 operates with power-supply voltages of
2.5V to 5.5V. Bypass the power supply to GND with a
0.047µF capacitor as close to the device as possible.
Add a 1µF capacitor if the MAX6956 is far away from
the board’s input bulk decoupling capacitor.
mask
Port
D5
29
D5
X
X
REGISTER DATA
ISET
REGISTER DATA
mask
Port
D4
28
D4
PC Board Layout Considerations
resistor as short as possible, and take the
X
X
Power-Supply Considerations
mask
Port
D3
D3
27
X
X
Serial Interface Latency
Low-Voltage Operation
mask
Port
D2
D2
26
X
X
mask
D1
Port
X
X
D1
25
2
C inter-
mask
D0
Port
D0
0
1
24
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