MAX6852AEE+T Maxim Integrated Products, MAX6852AEE+T Datasheet

IC VFD CTRLR MATRIX 16QSOP

MAX6852AEE+T

Manufacturer Part Number
MAX6852AEE+T
Description
IC VFD CTRLR MATRIX 16QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX6852AEE+T

Display Type
Vacuum Fluorescent (VF)
Configuration
5 x 7 (Matrix)
Interface
Serial
Current - Supply
3.5mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Digits Or Characters
-
The MAX6852 compact vacuum-fluorescent display
(VFD) controller provides microprocessors with the mul-
tiplex timing for 5 x 7 matrix VFD displays up to 96
characters and controls industry-standard, shift-regis-
ter, high-voltage grid/anode VFD tube drivers. The
device supports display tubes using either one or two
digits per grid, as well as universal displays. The
MAX6852 provides an internal crosspoint switch to
match any tube-driver shift-register grid/anode order,
and is compatible with both chip-in-glass and external
tube drivers. Hardware is included to simplify the gener-
ation of cathode bias and filament supplies and to pro-
vide up to five logic outputs, including a buzzer driver.
The MAX6852 includes an ASCII 104-character font,
multiplex scan circuitry, and static RAM that stores
digit, cursor, and annunciator data, as well as font data
for 24 user-definable characters. The display intensity
can be adjusted by an internal 16-step digital bright-
ness control. The device also includes separate annun-
ciator and cursor control with automatic blinking, as
well as a low-power shutdown mode.
The MAX6852 provides timing to generate the PWM
waveforms to drive the tube filament from a DC supply.
The filament drive is synchronized to the display multi-
plexing to eliminate beat artifacts. The MAX6852 is
compatible with SPI™ and QSPI™.
For a 2-wire interfaced version, refer to the MAX6853
data sheet.
19-2537; Rev 1; 11/02
Pin Configuration and Functional Diagram appear at end of
data sheet.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Display Modules
Retail POS Displays
Weight and Tare
Displays
________________________________________________________________ Maxim Integrated Products
4-Wire Interfaced, 5
General Description
Bar Graph Displays
Industrial Controllers
Applications
Fluorescent Display Controller
o High-Speed 26MHz SPI-/QSPI-/MICROWIRE™-
o 2.7V to 3.6V Operation
o Controls Up to 96 5 x 7 Matrix Characters
o One Digit and Two Digits per Grid and Universal
o 16-Step Digital Brightness Control
o Built-In ASCII 104-Character Font
o 24 User-Definable Characters
o Up to Four Annunciators per Grid with Automatic
o Separate Cursor Control with Automatic Blinking
o Filament Drive Full-Bridge Waveform Synthesis
o Buzzer Tone Generator with Single-Ended or
o Up to Five General-Purpose Logic Outputs
o 9µA Low-Power Shutdown (Data Retained)
o 16-Pin QSOP Package
MAX6852AEE
Compatible Serial Interface
Displays Supported
Blinking Control
Push-Pull Driver
PART
MICROCONTROLLER
Typical Application Circuit
7 Matrix Vacuum-
DOUT
SCLK
0.1µF
CS
-40°C to +125°C
TEMP RANGE
VFD SUPPLY VOLTAGE
Ordering Information
DIN
SCLK
CS
CHIP-ON-GLASS VFD
MAX6852
GND
VFBLANK
VFDOUT
VFLOAD
VFCLK
OSC2
OSC1
56pF
PIN-PACKAGE
16 QSOP
Features
10kΩ
1

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MAX6852AEE+T Summary of contents

Page 1

... Pin Configuration and Functional Diagram appear at end of data sheet. SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. ✕ ...

Page 2

Interfaced, 5 Fluorescent Display Controller ABSOLUTE MAXIMUM RATINGS Voltage (with respect to GND) V+ .............................................................................-0.3V to +4V CS ......................................................-0.3V to +5.5V DIN, SCLK, All Other Pins................................................-0.3V to (V+ + 0.3V) Current V+..................................................................................200mA GND .............................................................................-200mA PHASE1, PHASE2, PORT0, PORT1, PUMP................±150mA ...

Page 3

Interfaced ELECTRICAL CHARACTERISTICS (continued) (Typical operating circuit 2.7V to 3.6V, T PARAMETER SYMBOL Output Rise and Fall Time PHASE1, PHASE2, PORT0, PORT1, PUMP, VFLOAD, VFDOUT, VFCLK, VFBLANK Output High-Voltage PHASE1, PHASE2, PORT0, PORT1, PUMP, VFLOAD, ...

Page 4

Interfaced, 5 Fluorescent Display Controller (Typical operating circuit 3.3V +25°C, unless otherwise noted.) A SUPPLY CURRENT vs. SUPPLY VOLTAGE 2.2 2.1 2 +125° -40°C A 1.8 1.7 1.6 1.5 ...

Page 5

Interfaced, 5 (Typical operating circuit 3.3V vs. TEMPERATURE OSC 2.5 2.0 1.5 1.0 0.5 0 -40 -25 - TEMPERATURE (°C) PIN NAME Serial-Clock Output to External Driver. Push-pull clock output ...

Page 6

Interfaced, 5 Fluorescent Display Controller PIN NAME Multiplex Clock Input 1. To use the internal oscillator, connect capacitor C 15 OSC1 use the external clock, drive OSC1 with a 2MHz-to-8MHz CMOS clock. 16 OSC2 Multiplex Clock Input 2. Connect ...

Page 7

Interfaced, 5 GRID 1 GRID 2 Figure 2. Example of a Two-Digits-per-Grid Display (8 Grids, 16 Digits) °C ° ANNUNCIATOR SEGMENTS MATRIX CHARACTER WITH 35 SEGMENTS DECIMAL POINT (DP) SEGMENT CURSOR SEGMENT ✕ ...

Page 8

Interfaced, 5 Fluorescent Display Controller The PORT0 and PORT1 outputs can be individually configured as either 625Hz, 1250Hz, or 2500Hz clocks (OSC = 4MHz) intended for buzzer driving, the 4-wire serial interface’s DOUT data output, blink or shutdown status ...

Page 9

Interfaced, 5 Table 1. Display Modes DISPLAY MAXIMUM NO. OF DIGITS MODE 48 digits, each with a DP segment and a cursor 48/1 mode segment 96 digits, each with a DP segment and a cursor 96/2 mode segment Table ...

Page 10

Interfaced, 5 Fluorescent Display Controller Table 3. Initial Power-Up Register Status REGISTER POWER-UP CONDITION VFBLANK is high to disable the VFBLANK polarity display Intensity 1/16 (min on) Grids Display has 1 grid Shutdown enabled, Configuration configuration unlocked User-defined font ...

Page 11

Interfaced, 5 Table 4. Character and Annunciator Register Address Map in 48/1 Mode REGISTER Digit matrix character Digit matrix character Digit matrix character UP TO Digit 45 ...

Page 12

Interfaced, 5 Fluorescent Display Controller Table 6. Character Registers Format MODE Writing character data to use font map data with DP segment unlit Writing character data to use font map data with DP segment lit Shutdown Mode (S Data ...

Page 13

Interfaced, 5 Control and Operation Using the 4-Wire Controlling the MAX6852 requires sending a 16-bit word. The first byte, D15 through D8, is the command address, and the second byte, D7 through D0, is the data to be written ...

Page 14

Interfaced, 5 Fluorescent Display Controller CS SCLK DIN DOUT Figure 6. 4-Wire Serial Interface Timing Diagram CS CLK D15 = 0 D13 DIN D14 D12 DOUT Figure 7. 16-Bit Write Transmission to the MAX6852 If fewer or greater than ...

Page 15

Interfaced CLK N-15 N- BIT BIT DIN 1 2 N-31 N-30 DOUT Figure 8. Transmission of More than 16 Bits to the MAX6852 ister, high-voltage grid/anode VFD tube drivers (Figures 3 and 4). The speed ...

Page 16

Interfaced, 5 Fluorescent Display Controller VFLOAD VFCLK VFDOUT Figure 9. VFD Interface Timing Diagram 100µs TIMESLOT 100µs TIMESLOT GRID 0 GRID 1 500ns 500ns 500ns 500ns VFCLK DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 VFDOUT ...

Page 17

Interfaced, 5 100µs TIMESLOT 100µs TIMESLOT GRID 0 GRID 1 MINIMUM 6.25µs INTERDIGIT BLANKING INTERVAL (OSC = 4MHz) VFBLANK 1/16TH (MIN ON) 2/16TH 3/16TH 4/16TH 5/16TH 6/16TH 7/16TH 8/16TH 9/16TH 10/16TH 11/16TH 12/16TH 13/16TH 14/16TH 15/16TH 15/16TH (MAX ON) ...

Page 18

Interfaced, 5 Fluorescent Display Controller The output map is an indirect addressing reference table. It translates bit position in the output shift register (valid range: from zero to the value in shift-limit register 0x0E) to bit function. Any output ...

Page 19

Interfaced, 5 1-1 2-1 3-1 SEG 1 SEG 2 SEG 3 SEG 4 2-2 3-2 1-2 SEG 9 SEG 6 SEG 7 SEG 8 1-3 2-3 3-3 SEG 11 SEG 14 SEG 12 SEG 13 1-4 2-4 3-4 SEG ...

Page 20

Interfaced, 5 Fluorescent Display Controller The multiplex clock frequency determines the multiplex scan rate and the blink timing. The display scan rate is {OSC / 400 / (1 + grids register value)}. There are 400 OSC cycles per digit ...

Page 21

Interfaced, 5 Table 10. User-Definable Font Pointer Base Address FONT COMMAND CHARACTER ADDRESS RAM00 0x05 RAM01 0x05 RAM02 0x05 RAM03 0x05 RAM04 0x05 RAM05 0x05 RAM06 0x05 RAM07 0x05 RAM08 0x05 RAM09 0x05 RAM10 0x05 RAM11 0x05 RAM12 0x05 ...

Page 22

Interfaced, 5 Fluorescent Display Controller Table 11. User-Definable Character Storage Example FONT FONT ADDRESS CHARACTER POINTER RAM00 0x00 RAM00 0x01 RAM00 0x02 RAM00 0x03 RAM00 0x04 RAM01 0x05 RAM01 0x06 RAM01 0x07 RAM01 0x08 RAM01 0x09 RAM02 0x0A RAM02 ...

Page 23

Interfaced, 5 Table 14. Annunciator Registers Format ANNUNCIATOR BYTE BIT ALLOCATIONS Annunciator A1 is off. Annunciator A1 is lit only for the first half of each blink period. Annunciator A1 is lit only for the second half of each ...

Page 24

Interfaced, 5 Fluorescent Display Controller Table 18. Blink Rate Selection (B Data Bit D2) Format MODE Slow blinking (cursor and annunciators blink on for 1s, off for 1s, for OSC = 4MHz) Fast blinking (cursor and annunciators blink on ...

Page 25

Interfaced, 5 Table 24. Grids Register Format GRIDS Display has 1 grid: G0 Display has 2 grids: G0 and G1 Display has 3 grids Display has 4 grids Display has 45 ...

Page 26

Interfaced, 5 Fluorescent Display Controller Table 26. VFBLANK Polarity Register Format GRIDS VFBLANK is high to disable the display. VFBLANK is low to disable the display. Table 27. Display-Test and Device ID Register Format MODE Normal operation Display test ...

Page 27

Interfaced, 5 Table 29. Output Map RAM Codes OUTPUT MAP RAM CODE (DECIMAL 48, 49, 50, 51, 52 53, 54, 55, 56 matrix character segments 58, 59, 60, 61, 62 63, 64, ...

Page 28

Interfaced, 5 Fluorescent Display Controller Table 30. Output Map RAM Initial Power-Up Status OUTPUT MAP RAM OUTPUT MAP RAM CODE ON ADDRESS 0x00 to 0x27 0x28, 0x29, 0x2A, 0x2B, 0x2C 0x2D, 0x2E, 0x2F, 0x30, 0x31 0x32, 0x33, 0x34, 0x35, ...

Page 29

Interfaced, 5 Table 33. Reading Output Map Data MODE Read output map data; output map address pointer is autoincremented after the output map data has been read from the current location. Table 34. Filament Bridge Driver Timing TIMING POINT ...

Page 30

Interfaced, 5 Fluorescent Display Controller Table 37. PHASE2 Register Format PHASE2 BEHAVIOR General-purpose output, logic 0. This is the power-up condition. General-purpose output, logic 1. Output gives blink status blink phase P0 blink phase P1. ...

Page 31

Interfaced, 5 Table 40. PORT1 Register Format PORT1 PORT BEHAVIOR General-purpose output, logic 0. General-purpose output, logic 1. This is the power-up condition. Output gives blink status blink phase P0 blink phase P1. DOUT output. ...

Page 32

... Maxim reserves the right to change the circuitry and specifications without notice at any time. implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 32 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © ...

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