MAX5952AUAX+ Maxim Integrated Products, MAX5952AUAX+ Datasheet

IC PSE CNTRLR FOR POE 36-SSOP

MAX5952AUAX+

Manufacturer Part Number
MAX5952AUAX+
Description
IC PSE CNTRLR FOR POE 36-SSOP
Manufacturer
Maxim Integrated Products
Type
Power Over Ethernet Controller (PoE)r
Datasheet

Specifications of MAX5952AUAX+

Applications
Remote Peripherals (Industrial Controls, Cameras, Data Access)
Internal Switch(s)
No
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-BSOP (0.300", 7.5mm Width)
Product
PoE / LAN Solutions
Supply Voltage (max)
60 V
Supply Voltage (min)
32 V
Power Dissipation
941 mW
Operating Temperature Range
0 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX5952 is a quad -48V power controller
designed for use in IEEE
802.3at-compatible power-sourcing equipment (PSE).
This device provides powered device (PD) discovery,
classification, current limit, DC and AC load disconnect
detections in compliance with the IEEE 802.3af stan-
dard. The MAX5952 is pin compatible with MAX5945/
LTC4258/LTC4259A PSE controllers and provides addi-
tional features.
The MAX5952 features high-power mode that provides
up to 45W per port. The MAX5952 provides instanta-
neous readout of each port current through the I
face. The MAX5952 also provides high-capacitance
detection for legacy PDs.
The device features an I
face, and is fully software configurable and programma-
ble. The class-overcurrent detection function enables
system power management to detect if a PD draws more
than the allowable current. The MAX5952’s extensive pro-
grammability enhances system flexibility, enables field
diagnosis, and allows for uses in other applications.
The MAX5952 provides four operating modes to suit dif-
ferent system requirements. Auto mode allows the device
to operate automatically without any software supervision.
Semi-automatic mode automatically detects and classi-
fies a device connected to a port after initial software acti-
vation, but does not power up that port until instructed to
by software. Manual mode allows total software control of
the device and is useful for system diagnostics.
Shutdown mode terminates all activities and securely
turns off power to the ports.
The MAX5952 provides input undervoltage lockout
(UVLO), input undervoltage detection, input overvolt-
age lockout, overtemperature detection, output voltage
slew-rate limit during startup, power-good status, and
fault status. The MAX5952’s programmability includes
startup timeout, overcurrent timeout, and load-discon-
nect detection timeout.
The MAX5952 is available in a 36-pin SSOP package and
is rated for both extended (-40°C to +85°C) and upper
commercial (0°C to +85°C) temperature ranges.
19-0858; Rev 1; 1/10
IEEE is a registered service mark of the Institute of Electrical
and Electronics Engineers, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Power-Sourcing Equipment (PSE)
Switches/Routers
Midspan Power Injectors
________________________________________________________________ Maxim Integrated Products
2
General Description
C-compatible, 3-wire serial inter-
®
802.3af-compliant/pre-IEEE
High-Power, Quad, PSE Controller
Applications
2
C inter-
for Power-Over-Ethernet
o IEEE 802.3af Compliant/Pre-IEEE 802.3at
o Instantaneous Readout of Port Current Through
o High-Power Mode Enables Up to 45W Per Port
o High-Capacitance Detection for Legacy Devices
o Pin Compatible to MAX5945 and
o Four Independent Power-Switch Controllers
o PD Detection and Classification
o Supports Both DC and AC Load Removal
o I
o Current Foldback and Duty-Cycle-Controlled
o Open-Drain INT Signal
o Direct Fast Shutdown Control Capability
+ Denotes a lead(Pb)-free/RoHS-compliant package.
* Future product—contact factory for availability.
Pin Configuration and Selector Guide appear at end of data
sheet.
MAX5952AEAX+*
MAX5952AUAX+
MAX5952CEAX+*
MAX5952CUAX+*
Compatible
I
LTC4258/LTC4259A
Detections
Current Limit
2
2
C Interface
C-Compatible, 3-Wire Serial Interface
PART
Ordering Information
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
0°C to +85°C
0°C to +85°C
36 SSOP
36 SSOP
36 SSOP
36 SSOP
PIN-PACKAGE
Features
1

Related parts for MAX5952AUAX+

MAX5952AUAX+ Summary of contents

Page 1

... C-Compatible, 3-Wire Serial Interface o Current Foldback and Duty-Cycle-Controlled Current Limit o Open-Drain INT Signal o Direct Fast Shutdown Control Capability PART MAX5952AEAX+* MAX5952AUAX+ MAX5952CEAX+* MAX5952CUAX+* + Denotes a lead(Pb)-free/RoHS-compliant package. * Future product—contact factory for availability. Applications Pin Configuration and Selector Guide appear at end of data sheet ...

Page 2

High-Power, Quad, PSE Controller for Power-Over-Ethernet ABSOLUTE MAXIMUM RATINGS (Voltages referenced unless otherwise noted RESET, A3–A0, SHD_, OSC, AGND, DGND, DET_ SCL, SDAIN, and AUTO ......................................-0.3V to +80V OUT_........................................................-12V to (AGND + 0.3V) ...

Page 3

ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL CURRENT LIMIT Current-Limit Clamp Voltage V ...

Page 4

High-Power, Quad, PSE Controller for Power-Over-Ethernet ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL ...

Page 5

ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL LOAD DISCONNECT DC Load Disconnect V ...

Page 6

High-Power, Quad, PSE Controller for Power-Over-Ethernet ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL ...

Page 7

ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL Differential Nonlinearity DNL ADC Absolute Accuracy ...

Page 8

High-Power, Quad, PSE Controller for Power-Over-Ethernet (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A ANALOG SUPPLY CURRENT vs. INPUT VOLTAGE 5.3 MEASURED AT ...

Page 9

V = +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A FOLDBACK CURRENT-LIMIT THRESHOLD vs. OUTPUT VOLTAGE 300 250 200 150 100 ...

Page 10

High-Power, Quad, PSE Controller for Power-Over-Ethernet (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A RESET TO OUT TURN-OFF DELAY MAX5952 toc16 100µs/div OVERCURRENT ...

Page 11

V = +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A DETECTION WITH INVALID PD (33kΩ) MAX5952 toc22 0A 100ms/div DETECTION WITH MIDSPAN MODE WITH INVALID ...

Page 12

High-Power, Quad, PSE Controller for Power-Over-Ethernet (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A DETECTION WITH INVALID PD (OPEN CIRCUIT, USING TYPICAL OPERATING ...

Page 13

High-Power, Quad, PSE Controller PIN NAME Address Bits. A3–A0 form the lower part of the device’s address. Address inputs default high with an internal 50kΩ pullup resistor to V 7–10 A3–A0 its UVLO threshold or after a reset. The 3 ...

Page 14

High-Power, Quad, PSE Controller for Power-Over-Ethernet V SCL SDAIN SDAOUT SHD_ DD SERIAL PORT INTERFACE (SPI REGISTER FILE A3 AUTO MIDSPAN CENTRAL LOGIC UNIT (CLU) RESET INT DGND V DD AGND ANALOG +10V ANALOG BIAS/ SUPPLY +5V ...

Page 15

Detailed Description The MAX5952 is a quad -48V power controller designed for use in IEEE 802.3af-compliant/pre-IEEE 802.3at-compatible PSE. This device provides PD dis- covery, classification, current limit, DC and AC load disconnect detections in compliance with the IEEE 802.3af standard. ...

Page 16

High-Power, Quad, PSE Controller for Power-Over-Ethernet Operation Modes The MAX5952 contains four independent, but identical state machines to provide reliable and real-time control of the four network ports. Each state machine has four operating modes: auto mode, semi-auto mode, manual, ...

Page 17

A valid PD has a 25kΩ discovery signature characteristic as specified in the IEEE 802.3af/at standard. Table 1 shows the IEEE 802.3af/at specification for a PSE detect- ing a valid PD signature. See the Typical Operating Circuits and Figure 1 ...

Page 18

High-Power, Quad, PSE Controller for Power-Over-Ethernet Powered Device Classification (PD Classification) During the PD classification mode, the MAX5952 forces a probe voltage (-18V) at DET_ and measures the cur- rent into DET_. The measured current determines the class of the ...

Page 19

PGOOD POK PGOOD Figure 2. PGOOD Timing Overcurrent Protection A sense resistor R connected between SENSE_ and S V monitors the load current. Under normal operating EE conditions, the voltage across R S the threshold ...

Page 20

High-Power, Quad, PSE Controller for Power-Over-Ethernet When CL_DISC (R17h[2]) is set to 0, high-power mode is configured by setting the ICUT bits to any combina- tion other than 000, 110, or 111 (note that 000 is the default value for ...

Page 21

V supplies power for the internal logic circuitry ranges from +3.0V to +5.5V and determines the logic thresholds for the CMOS connections (SDAIN, SDAOUT, SCL, AUTO, SHD_, A_). This voltage range enables the MAX5952 to interface with a ...

Page 22

High-Power, Quad, PSE Controller for Power-Over-Ethernet R1Dh, R1Eh, and R1Fh registers control the watchdog operation. The watchdog function, when enabled, allows the MAX5952 to gracefully take over control or securely shuts down the power to the ports in case of ...

Page 23

Each transmission consists of a START condition (Figure 6) sent by a master, followed by the MAX5952 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition. START and STOP ...

Page 24

High-Power, Quad, PSE Controller for Power-Over-Ethernet The MAX5952 has a 7-bit long slave address (Figure 9). The bit following the 7-bit slave address (bit eight) is the R/W bit, which is low for a write command and high for a ...

Page 25

Message Format for Reading The MAX5952 reads using the MAX5952’s internally stored command byte as an address pointer, the same way the stored command byte is used as an address pointer for a write. The pointer auto-increments after reading each ...

Page 26

High-Power, Quad, PSE Controller for Power-Over-Ethernet Register Map and Description The interrupt register (Table 6) summarizes the event register status and is used to send an interrupt signal (INT goes low) to the controller. Writing R1Ah[7] clears ...

Page 27

The power event register (Table 8) records changes in the power status of the four ports. Any change in PGOOD_ (R10h[7:4]) sets PG_CHG_ to 1. Any change in the PWR_EN_ (R10h[3:0]) sets PWEN_CHG_ to 1. PG_CHG_ and PWEN_CHG_ trigger on ...

Page 28

High-Power, Quad, PSE Controller for Power-Over-Ethernet LD_DISC_ is set high whenever the corresponding port shuts down due to detection of load removal. IMAX_FLT_ is set high when the port shuts down due to an extended overcurrent event after a successful ...

Page 29

The MAX5952 continuously monitors the power sup- plies and sets the appropriate bits in the supply event register (Table 12 DD_OV EE_OV exceeds its overvoltage threshold set to 1 whenever ...

Page 30

High-Power, Quad, PSE Controller for Power-Over-Ethernet The port status register (Table 13a) records the results of the detection and classification at the end of each phase in three encoding bits each. R0Ch contains the detection and classification status of port ...

Page 31

PGOOD_ is set to 1 (Table 14) at the end of the power- up startup period if the power-good condition is met (0 < < The power-good condition OUT EE TH must remain valid ...

Page 32

High-Power, Quad, PSE Controller for Power-Over-Ethernet The MAX5952 uses two bits for each port to set the mode of operation. Set the modes according to Table 16a. A reset sets R12h = AAAAAAAA where A represents the latched-in state of ...

Page 33

Setting DET_EN_/CLASS_EN_ to 1 (Table 18) enables load detection/classification, respectively. Detection always has priority over classification. To perform clas- sification without detection, set the DET_EN_ bit low and CLASS_EN_ bit high. In manual mode, R14h works like a pushbutton. Set ...

Page 34

High-Power, Quad, PSE Controller for Power-Over-Ethernet TSTART[1,0] (Table 20a) programs the startup timers. Startup time is the time the port is allowed cur- rent limit during startup. TFAULT[1,0] programs the fault time. Fault time is the time ...

Page 35

Setting CL_DISC to 1 (Table 21) enables port over class current protection, where MAX5952 scales down the overcurrent limit (V ) according to the port FLT_LIM classification status. This feature provides protection to the system against PDs that violate their ...

Page 36

High-Power, Quad, PSE Controller for Power-Over-Ethernet Writing CLR_INT (Table 23) clears all the event registers and the corresponding interrupt bits in regis- ter R00h. Writing RESET_P_ turns off power to the corresponding port and ...

Page 37

Enable the SMODE function (Table 25) by setting EN_WHDOG (R1Fh[7 SMODE_ bit goes high when the watchdog counter reaches zero and the port(s) switch over to hardware-controlled mode. Table 25. SMODE Enable Register ADDRESS = 1Ch SYMBOL BIT ...

Page 38

High-Power, Quad, PSE Controller for Power-Over-Ethernet Setting EN_WHDOG (Table 27) high activates the watchdog counter. When the counter reaches zero, the port switches to the hardware-controlled mode deter- mined by the corresponding HWMODE_ bit. A low in HWMODE_ switches the ...

Page 39

Table 29. High-Power Mode Register ADDRESS = 24h SYMBOL BIT R/W 7 — 3 — Reserved 2 — 1 — 0 — Table 30. Reserved ADDRESS = 25h SYMBOL BIT R/W 7 — 6 — 5 — 4 — Reserved ...

Page 40

High-Power, Quad, PSE Controller for Power-Over-Ethernet The IVEE bits enable the current-limit scaling (Table 32). This feature is used to reduce the current limit for systems running at higher voltage to maintain the Table 32. Miscellaneous Configurations 2 ADDRESS = ...

Page 41

Table 34c. ICUT Register Bit Values for Current-Limit Threshold ICUT_[2:0] (ADDRESS = 2Ah, 2Bh) 000 001 010 011 100 101 110 111 Table 35. Classification Status Registers ADDRESS = 2Ch, 2Dh, 2Eh, 2Fh SYMBOL BIT R/W 7 — Reserved 6 ...

Page 42

High-Power, Quad, PSE Controller for Power-Over-Ethernet Table 37. Register Summary ADDR REGISTER NAME R/W PORT INTERRUPTS 00h Interrupt RO G SUP_FLT 01h Int Mask R/W G MASK7 EVENTS 02h Power Event RO 4321 PG_CHG4 03h Power Event CoR CoR 04h ...

Page 43

Table 37. Register Summary (continued) ADDR REGISTER NAME R/W PORT MAXIM RESERVED 20H Reserved G Reserved 21H Reserved G Reserved 22H Reserved G Reserved 23H Program 1 R/W 4321 Reserved 24h High Power Mode R/W G Reserved 25h Reserved — ...

Page 44

High-Power, Quad, PSE Controller for Power-Over-Ethernet PHY ISOLATION V (3.3V) CC 1.8V TO 5V, (REF TO DGND) 3kΩ 180Ω HPCL063L VCCRTN OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER *USE HALO TG111-HRPE40NY OR PULSE HX6015NL FOR HIGH POWER ...

Page 45

ISOLATION V (3.3V (REF TO DGND) 180Ω 3kΩ HPCL063L VCCRTN OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER Figure 14. PoE System Block Diagram ______________________________________________________________________________________ High-Power, Quad, PSE Controller for Power-Over-Ethernet -48VRTN V DD ...

Page 46

High-Power, Quad, PSE Controller for Power-Over-Ethernet R10 2Ω R6 1Ω C3 15nF Q4 MMBTA56 GND GND 1 MAX5020 0.47µF 4 100V SS_SHDN C2 0.022µF -48V -48V Figure 15. -48V to +3.3V (300mA) Boost ...

Page 47

High-Power, Quad, PSE Controller DESIGNATION DESCRIPTION C1 0.1µF, 25V ceramic capacitor C2 0.022µF, 25V ceramic capacitor C3 15nF, 25V ceramic capacitor C4 220µF capacitor Sanyo 6SVPA220MAA C5 4.7µF, 16V ceramic capacitor C6 0.47µF, 100V ceramic capacitor C7 0.22µF, 16V ceramic ...

Page 48

High-Power, Quad, PSE Controller for Power-Over-Ethernet ISOLATION V (3.3V) CC 3kΩ VCCRTN HPCL063L OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER NOTE: ALL SIGNAL PINS ARE REFERENCED TO DGND. DGND RANGE IS BETWEEN V Typical Operating Circuit 1 ...

Page 49

ISOLATION V (3.3V) CC 1.8V TO 3.7V, (REF TO DGND) 180Ω 3kΩ HPCL063L VCCRTN OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER NOTE: ALL SIGNAL PINS ARE REFERENCED TO DGND. DGND MUST BE CONNECTED DIRECTLY TO AGND FOR ...

Page 50

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 50 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2010 Maxim Integrated Products ...

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