LTC4211CS8#TR Linear Technology, LTC4211CS8#TR Datasheet - Page 24

• Manufacturer Part Number: LTC4211CS8#TR
• Description: IC CONTROLLER HOT SWAP 8-SOIC
• Manufacturer: Linear Technology
• Type: Hot-Swap Controllerr

Specifications of LTC4211CS8#TR

• Applications: General Purpose
• Internal Switch(s): No
• Voltage - Supply: 2.5 V ~ 16.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Linear Misc Type: Positive Low Voltage
• Family Name: LTC4211
• Package Type: SOIC N
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 16.5V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 3.99mm
• Product Height (mm): 1.5mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC4211CS8TR

LTC4211
A more elaborate connection sense scheme is shown in
Figure 16. The bases of Q1 and Q2 are wired to short pins
located on opposite ends of the edge connector because
the installation/removal of printed circuit cards generally
requires rocking the card back and forth. When V
makes connection, the bases of transistors Q1 and Q2 are
pulled high, biasing them ON. When either one of them is
ON, the LTC4211’s ON pin is held low, keeping the
LTC4211 OFF. When both the short base connector pins
APPLICATIO S I FOR ATIO
24
V
5V
RESET
IN
Z1 = 1SMA10A OR SMAJ10A
* OPTIONAL
V
5V
CC
Z1*
U
CONNECTOR
BACKPLANE
CONNECTION
(FEMALE)
R
10Ω
Figure 13. Hot Swap Controller On Daughter Board (Staggered Pin Connections)
X
C
0.1µF
SENSE
X
U
Figure 14. Hot Swap Controller on Backplane (Staggered Pin Connections)
PCB
CONNECTOR
PCB EDGE
(MALE)
R5
10k
W
Q2
LONG
SHORT
SHORT
LONG
R4
10k
Z1 = 1SMA10A OR SMAJ10A
* OPTIONAL
2
4
V
5V
IN
ON
GND
10k
R2
V
Z1*
CC
U
LTC4211
8
R
0.007Ω
TIMER
SENSE
3
R1
10Ω
SENSE
RESET
C1
0.1µF
GATE
C
10nF
TIMER
FB
7
CC
6
1
5
Si4410DY
R6
10k
1
2
4
Q1
RESET
ON
GND
R7
15k
of Q1 and Q2 finally mate to the backplane, their bases are
grounded, biasing the transistors OFF. The ON pin volt-
age is then pulled high by R3 enabling the LTC4211 and
a power-up cycle begins.
A software-initiated power-down cycle can be started by
momentarily driving transistor M1 with a logic high signal.
This in turn will drive the LTC4211’s ON pin low. If the ON
pin is held low for more than 8µs, the LTC4211’s GATE pin
is switched to ground.
LTC4211
TIMER
3
R3
10k
SENSE
GATE
C
10nF
V
TIMER
CONNECTOR
BACKPLANE
FB
CC
(FEMALE)
8
7
6
5
R
0.007Ω
SENSE
CONNECTOR
PCB EDGE
(MALE)
Si4410DY
LONG
LONG
SHORT
SHORT
SHORT
Q1
+
R2
100k
R4
36k
R5
15k
C
RESET
OUT
+
4211 F14
4211 F13
C
V
5V
5A
OUT
R1
36k
OUT
V
5V
5A
OUT
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