MAX8759ETI+T Maxim Integrated Products, MAX8759ETI+T Datasheet - Page 24

IC CNTRL CCFL BACKLIGHT 28TQFN

MAX8759ETI+T

Manufacturer Part Number
MAX8759ETI+T
Description
IC CNTRL CCFL BACKLIGHT 28TQFN
Manufacturer
Maxim Integrated Products
Type
CCFL Controllerr
Datasheet

Specifications of MAX8759ETI+T

Frequency
30 ~ 80 kHz
Current - Supply
2.5mA
Voltage - Supply
4.5 V ~ 28 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output
-
Lead Free Status / Rohs Status
 Details
The relationships among these 3 control bits can be
thought of as specifying an operating mode for the invert-
er. The defined modes are shown in Table 4. Note that
depending on the settings of some bits, other bits have
no effect and are don’t-care bits—they are shown with a
value of X in Table 4. For example, when the ALS_CTL bit
is 1, the value of PWM_SEL has no effect on the operation
of the inverter, so its value is shown as X.
ALSDEL0 and ALSDEL1 set the delay time required
to change the brightness in ALS mode. This delay time is
necessary for smooth transitions during brightness
change. Table 5 shows the available delays.
Note that the behavior of register 0x00 (brightness con-
trol register) is affected by certain combinations of the
control bits as shown in Table 4.
When SMBus mode is selected, register 0x00 reflects the
last value written to it. However, when any non-SMBus
mode is selected, register 0x00 reflects the current bright-
ness value based on the current mode of operation.
This register has 3 status bits that allow monitoring the
inverter’s operating state. Bit 0 is a logical OR of open-
lamp fault and overcurrent fault. Bit 2 indicates sec-
ondary/UL overcurrent fault. Bit 3 always indicates the
current lamp on/off status. The value of this bit is one
whenever both lamp 1 and lamp 2 are on. The value of
this bit is zero whenever lamp 1 or lamp 2 is off. The
Low-Cost, SMBus, CCFL Backlight Controller
24
LAMP_STAT: Lamp status bit (1 = lamp 1 and lamp 2 are on, 0 = lamp 1 or lamp 2 is off).
OV_CURR: Secondary/UL overcurrent fault (1 = secondary/UL overcurrent fault, 0 = no secondary/UL overcurrent).
FAULT: Fault bit (1 = open-lamp or primary overcurrent fault, 0 = no fault).
Reserved
BIT 7 (R)
______________________________________________________________________________________
Fault/Status Register [0x02] (POR = 0x00)
Reserved
BIT 6 (R)
Reserved
BIT 5 (R)
Reserved
BIT 4 (R)
LAMP_STAT
Table 4. Operating Modes Selected by
Device Control Register Bits 3, 2, and 1
Table 5. Delay Time Selected by Device
Control Register Bits 5, 4
remaining bits are reserved for future use. All reserved
bits return a zero when read. All the bits in this register
are read only. A write-byte cycle to register 0x02 has
no effect. Write zero to bit 0 of register 0x01 to clear the
fault bit.
BIT 3 (R)
ALS_CTL
ALSDEL1
1
1
0
0
0
1
1
0
0
PWM_MD
ALSDEL0
OV_CURR
BIT 2 (R)
1
0
X
1
0
1
0
1
0
PWM_SEL
DELAY TIME
20 (default)
X
X
1
0
0
Reserved
BIT 1 (R)
(ms)
25
15
10
ALS mode
ALS mode with DPST
PWM mode
SMBus mode
SMBus mode with
DPST
MODE
PERIODS
BIT 0 (R)
FAULT
N
5
3
2
4

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