LTC1154CS8 Linear Technology, LTC1154CS8 Datasheet - Page 6

IC MOSFET DRIVER HIGH-SIDE 8SOIC

LTC1154CS8

Manufacturer Part Number
LTC1154CS8
Description
IC MOSFET DRIVER HIGH-SIDE 8SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1154CS8

Configuration
High-Side
Input Type
Non-Inverting
Delay Time
160µs
Number Of Configurations
1
Number Of Outputs
1
Voltage - Supply
4.5 V ~ 18 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Peak
-
High Side Voltage - Max (bootstrap)
-

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PIN FUNCTIONS
LTC1154
Gate Drive Pin
The gate drive pin is either driven to ground when the switch
is turned OFF or driven above the supply rail when the switch
is turned ON. This pin is a relatively high impedance when
driven above the rail (the equivalent of a few hundred kΩ).
Care should be taken to minimize any loading of this pin
by parasitic resistance to ground or supply.
Supply Pin
The supply pin of the LTC1154 serves two vital purposes.
The fi rst is obvious: it powers the input, gate drive, regula-
tion and protection circuitry. The second purpose is less
obvious: it provides a Kelvin connection to the top of the
drain sense resistor for the internal 100mV reference.
The LTC1154 is designed to be continuously powered so
that the gate of the MOSFET is actively driven at all times.
If it is necessary to remove power from the supply pin
and then re-apply it, the input pin (or enable pin) should
be cycled a few milliseconds after the power is re-applied
to reset the input latch and protection circuitry. Also, the
input and enable pins should be isolated with 10k resistors
to limit the current fl owing through the ESD protection
diodes to the supply pin.
The supply pin of the LTC1154 should never be forced
below ground as this may result in permanent damage to
the device. A 300Ω resistor should be inserted in series
with the ground pin if negative supply voltage transients
are anticipated.
BLOCK DIAGRAM
6
STATUS
ENABLE
INPUT
LOW STANDBY
TTL-TO-CMOS
REGULATOR
CONVERTER
CURRENT
GND
V
S
ANALOG
ANALOG SECTION
REGULATORS
REFERENCE
VOLTAGE
100mV
DIGITAL
COMP
SHOT
ONE
FAULT DETECTION
OUTPUT DRIVER
AND STATUS
DELAY
10μs
Drain Sense Pin
The drain sense pin is compared against the supply pin
voltage. If the voltage at this pin is more than 100mV
below the supply pin, the input latch will be reset and the
MOSFET gate will be quickly discharged. Cycle the input,
or ENABLE input, to reset the short-circuit latch and turn
the MOSFET back on.
This pin is also a high impedance CMOS gate with ESD
protection and therefore should not be forced beyond the
power supply rails. To defeat the overcurrent protection,
short the drain sense to supply.
Some loads, such as large supply capacitors, lamps, or
motors require high inrush currents. An RC time delay
can be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false-trigger during start-up. This time constant can be
set from a few microseconds to many seconds. However,
very long delays may put the MOSFET in risk of being
destroyed by a short-circuit condition. (see Applications
Information Section).
Status Pin
The status pin is an open-drain output which is driven
low whenever a fault condition is detected. A 51k pull-up
resistor should be connected between this output and a
logic supply. The status pins of multiple LTC1154s can be
OR’d together if independent fault sensing is not required.
No connection is required to this pin when not in use.
R
S
LATCH
INPUT
AND DISCHARGE
CONTROL LOGIC
TTL-TO-CMOS
GATE CHARGE
AND CHARGE
OSCILLATOR
CONVERTER
SHUTDOWN
PUMP
GATE CHARGE
FAST/SLOW
LOGIC
DRAIN
SENSE
SHUTDOWN
GATE
LTC1154 • BD01
1154fb

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