LT1162ISW#TRPBF Linear Technology, LT1162ISW#TRPBF Datasheet - Page 9

• Manufacturer Part Number: LT1162ISW#TRPBF
• Description: IC PWR MOSFET DRIVER NCH 24SOIC
• Manufacturer: Linear Technology

Specifications of LT1162ISW#TRPBF

• Configuration: Half Bridge
• Input Type: Non-Inverting
• Delay Time: 250ns
• Current - Peak: 1.5A
• Number Of Configurations: 2
• Number Of Outputs: 4
• High Side Voltage - Max (bootstrap): 60V
• Voltage - Supply: 10 V ~ 15 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS
Power MOSFET Selection
Since the LT1160 (or 1/2 LT1162) inherently protects the
top and bottom MOSFETs from simultaneous conduction,
there are no size or matching constraints. Therefore selec-
tion can be made based on the operating voltage and
R
greater than the HV and should be increased to approxi-
mately (2)(HV) in harsh environments with frequent fault
conditions. For the LT1160 maximum operating HV supply
of 60V, the MOSFET BV
The MOSFET R
generally chosen based on the operating efficiency re-
quired as long as the maximum MOSFET junction tem-
perature is not exceeded. The dissipation while each
MOSFET is on is given by:
Where D is the duty cycle and ∂ is the increase in R
at the anticipated MOSFET junction temperature. From this
equation the required R
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
R
MOSFET in the form of a normalized R
ture curve, but ∂ = 0.007/°C can be used as an approxima-
tion for low voltage MOSFETs. Thus, if T
available heat sinking has a thermal resistance of 20°C/W,
the MOSFET junction temperature will be 125°C and
∂ = 0.007(125 – 25) = 0.7. This means that the required
R
which can be satisfied by an IRFZ34 manufactured by
International Rectifier.
Transition losses result from the power dissipated in each
MOSFET during the time it is transitioning from off to on,
or from on to off. These losses are proportional to (f)(HV)
and vary from insignificant to being a limiting factor on
operating frequency in some high voltage applications.
DS(ON)
DS(ON)
DS(ON)
P = D(I
R
DS ON
( )
would be 0.089Ω/(1 + ∂). (1 + ∂) is given for each
of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
requirements. The MOSFET BV
DS
=
)
2
D I
(1+∂)R
( )
DS(ON)
DS
U
P
2
( )
DS(ON)
1 ∂
is specified at T
+
DSS
DS(ON)
INFORMATION
U
should be from 60V to 100V.
can be derived:
W
DS(ON)
J
A
DSS
= 85°C and the
= 25°C and is
vs tempera-
should be
U
DS(ON)
2
Paralleling MOSFETs
When the above calculations result in a lower R
is economically feasible with a single MOSFET, two or
more MOSFETs can be paralleled. The MOSFETs will
inherently share the currents according to their R
ratio as long as they are thermally connected (e.g., on a
common heat sink). The LT1160 top and bottom drivers
can each drive five power MOSFETs in parallel with only a
small loss in switching speeds (see Typical Performance
Characteristics). A low value resistor (10Ω to 47Ω) in
series with each individual MOSFET gate may be required
to “decouple” each MOSFET from its neighbors to prevent
high frequency oscillations (consult manufacturer’s rec-
ommendations). If gate decoupling resistors are used the
corresponding gate feedback pin can be connected to any
one of the gates as shown in Figure 1.
Driving multiple MOSFETs in parallel may restrict the
operating frequency to prevent overdissipation in the
LT1160 (see the following Gate Charge and Driver Dissi-
pation).
Gate Charge and Driver Dissipation
A useful indicator of the load presented to the driver by a
power MOSFET is the total gate charge Q
the additional charge required by the gate-to-drain swing.
Q
When the supply current is measured in a switching
application, it will be larger than given by the DC electrical
characteristics because of the additional supply current
associated with sourcing the MOSFET gate charge:
G
I
is usually specified for V
SUPPLY
*OPTIONAL 10Ω
=
I
DC
LT1160
Figure 1. Paralleling MOSFETs
GATE DR
GATE FB
+
⎛
⎜
⎝
dQ
dt
G
⎞
⎟
⎠
TOP
GS
R
G
= 10V and V
*
+
⎛
⎜
⎝
LT1160/LT1162
dQ
dt
G
⎞
⎟
⎠
R
BOTTOM
G
G
DS
*
1160 F01
, which includes
= 0.8V
DS(ON)
DS(MAX)
DS(ON)
11602fb
than
9
.