AMIS30542C5421RG ON Semiconductor, AMIS30542C5421RG Datasheet
AMIS30542C5421RG
Specifications of AMIS30542C5421RG
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AMIS30542C5421RG Summary of contents
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... These Devices are Pb−Free and are RoHS Compliant* †Output current level may be limited by ambient temperature and heat sinking. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 October, 2009 − ...
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CLK CS DI SPI DO NXT DIR SLA POR/WD CLR ERR Table 1. PIN LIST AND DESCRIPTION Name Pin GND 1 Ground DI 2 SPI Data In CLK 3 SPI Clock Input NXT 4 Next micro−step input DIR 5 Direction ...
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GND DI CLK NXT DIR ERR SLA Table 2. ABSOLUTE MAXIMUM RATINGS Symbol V Analog DC supply voltage (Note Storage temperature ST T Junction Temperature under bias (Note Electrostatic discharges on component level, All ...
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Following figure gives the equivalent schematics of the user relevant inputs and outputs. The diagrams are simplified representations of the circuits used TYPE 1: CLR input TYPE 2 : CLK , DI, CSB , ...
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Table 5. DC PARAMETERS (The DC parameters are given for V specified) Convention: currents flowing in the circuit are defined as positive. Symbol Pin(s) Parameter SUPPLY AND VOLTAGE REGULATORS V Nominal operating supply range Total internal current ...
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Table 5. DC PARAMETERS (The DC parameters are given for V specified) Convention: currents flowing in the circuit are defined as positive. Symbol Pin(s) Parameter DIGITAL OUTPUTS V DO, ERR, Logic Low level open drain OL POR/WD THERMAL WARNING AND ...
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Table 6. AC PARAMETERS (The AC parameters are given for V Symbol Pin(s) Parameter INTERNAL OSCILLATOR f Frequency of internal oscillator osc MOTOR DRIVER f PWM frequency PWM Double PWM frequency MOTxx f PWM jitter Depth (Note 11 ...
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NXT Ì Ì Ì DIR Ì Ì Ì Ì Ì Ì Table 7. SPI TIMING PARAMETERS Symbol t SPI Clock Period CLK t SPI Clock High Time CLK_HIGH t SPI Clock Low Time CLK_LOW t DI Set Up Time, Valid ...
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100 nF mC Figure 7. Typical Application Schematic AMIS−30542 Table 8. EXTERNAL COMPONENTS LIST AND DESCRIPTION Component Function C V Buffer Capacitor (Note 13 Decoupling Block Capacitor 2 3 ...
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H−Bridge Drivers A full H−bridge is integrated for each of the two stator windings. Each H−bridge consists of two low−side and two high−side N−type MOSFET switches. Writing logic ‘0’ in bit <MOTEN> disables all drivers (high−impedance). Writing logic ‘1’ in ...
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Automatic Duty Cycle Adaptation In case the supply voltage is lower than 2*Bemf, then the duty cycle of the PWM is adapted automatically to > 50% to maintain the requested average current in the coils. This Icoil Duty Cycle < ...
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Table 10. CIRCULAR TRANSLATOR TABLE 000 001 1/32 1/16 MSP[6:0] 000 0000 ‘0’ 0* 000 0001 1 000 0010 2 000 0011 3 000 0100 4 000 0101 5 000 0110 6 000 0111 7 000 1000 8 000 1001 ...
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Table 11. CIRCULAR TRANSLATOR TABLE (CONTINUED) 000 001 1/32 1/16 MSP[6:0] 100 0000 64 32 100 0001 65 100 0010 66 33 100 0011 67 100 0100 68 34 100 0101 69 100 0110 70 35 100 0111 71 100 ...
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I y Start = 0 Step 1 Step 2 Step 3 th 1/4 micro step SM[2:0] = 011 Figure 10. Translator Table: Circular and Square Direction The direction of rotation is selected by means of following combination of the DIR ...
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Change from lower to higher resolution Iy DIR endpos NXT3 NXT4 Ix Halfstep 1/4 Left: Change from lower to higher resolution. The left−hand side depicts the ending half−step position during which a new step mode resolution was programmed. The right−hand ...
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Speed and Load Angle Output The SLA−pin provides an output voltage that indicates the level of the Back−e.m.f. voltage of the motor. This Back−e.m.f. voltage is sampled during every so−called ”coil I COIL V COIL V BB Because of the ...
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V COIL div4 Icoil=0 PWMsh PWMsh Icoil=0 SLAT V COIL SLA−pin SLAT = 1 => SLA−pin is “transparent” during V sampling @ Coil Current Zero BEMF Crossing. SLA−pin is updated “real−time”. Warning, Error Detection and Diagnostics Feedback Thermal Warning ...
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Error Output This is a digital output to flag a problem to the external microcontroller. The signal on this output is active low and the logic combination of: NOT(ERRB) = <TW> OR <TSD> OR <OVCXij> OR <OVCYij> OR <OPENi> OR ...
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The voltage regulator remains active but with reduced current−output capability (I ). The watchdog timer LOADSLP stops running and it’s value is kept in the counter. Upon leaving sleep mode, this timer continues from the value it had before entering ...
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The serial peripheral interface (SPI) allows an external microcontroller (Master) to communicate AMIS−30542. The implemented SPI block is designed to interface directly with numerous micro−controllers from several manufacturers. AMIS−30542 acts always as a Slave and can’t initiate any transmission. The ...
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Two command types can be distinguished in the communication between master and AMIS−30542: • READ from SPI Register with address ADDR[4:0]: CMD2 = “0” • WRITE to SPI Register with address ADDR[4:0]: CMD2 = “1” READ Operation If the Master ...
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CS DI DATA from previous command or NOT VALID after POR or RESET DO Figure 21. Single WRITE Operation Where DATA from the Master is Written in SPI Register with Address 3 Examples of combined READ and WRITE Operations In ...
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Registers are updated with the internal status at the rising edge COMMAND WRITE DATA DI to ADDR2 DATA from previous command or NOT VALID after POR or RESET DATA OLD DATA DO or NOT VALID Figure 23. ...
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Table 14. SPI CONTROL PARAMETER OVERVIEW Symbol Description DIRCTRL Controls the direction of rotation (in combination with logic level on input DIR) NXTP Selects if NXT triggers on rising or falling edge EMC[1:0] Turn On – Turn−off Slopes of motor ...
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CUR[4:0] Selects IMCmax peak. This is the peak or amplitude of the regulated current waveform in the motor coils. Table 15. SPI CONTROL PARAMETER OVERVIEW CUR[4:0] Current Range (Note 18) Index CUR[4:0] 0 00000 1 00001 2 00010 3 00011 ...
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... POR (cold boot). WD bit will be cleared only when the master writes “0” to WDEN bit. Table 18. ORDERING INFORMATION Part No. AMIS30542C5421RG AMIS30542C54212G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...
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PACKAGE DIMENSIONS NQFP−32, 7x7 CASE 560AA−01 ISSUE O http://onsemi.com 28 ...
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... Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...