A3958SLBTR Allegro Microsystems Inc, A3958SLBTR Datasheet - Page 8

• Manufacturer Part Number: A3958SLBTR
• Description: IC MOTOR DRIVER PWM FULL 24-SOIC
• Manufacturer: Allegro Microsystems Inc

Specifications of A3958SLBTR

• Applications: PWM Motor Driver
• Number Of Outputs: 1
• Current - Output: ±2A
• Voltage - Load: 20 V ~ 50 V
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Operating Current: 10mA
• Operating Temperature Classification: Commercial
• Package Type: SOIC W
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

A3958
internally monitored and in the case of a fault condition,
the outputs of the device are disabled.
Charge Pump. The charge pump is used to generate a
gate-supply voltage greater than V
side DMOS gates. A 0.22 μF ceramic capacitor should be
connected between CP1 and CP2 for pumping purposes.
A 0.22 μF ceramic capacitor should be connected between
CP and V
DMOS devices. The CP voltage is internally monitored
and, in the case of a fault condition, the source outputs of
the device are disabled.
Shutdown. In the event of a fault (excessive junction
temperature, or low voltage on CP or V
the device are disabled until the fault condition is removed.
At power up, and in the event of low V
circuit disables the drivers and resets the data in the serial
port to all zeros.
PWM Timer Function. The PWM timer is
programmable via the serial port (bits D2 – D10) to
provide off-time PWM signals to the control circuitry.
In the mixed current-decay mode, the fi rst portion of the
off time operates in fast decay, until the fast decay time
count (serial bits D7 – D10) is reached, followed by slow
decay for the rest of the off-time period (bits D2 – D6).
If the fast decay time is set longer than the off time, the
device effectively operates in fast decay mode. Bit D17, in
conjunction with MODE, selects mixed or slow decay.
PWM Blank Timer. When a source driver turns on, a
current spike occurs due to the reverse recovery currents
of the clamp diodes and/or switching transients related to
distributed capacitance in the load. To prevent this current
spike from erroneously resetting the source-enable latch,
the sense comparator is blanked. The blank timer runs
after the off-time counter (see bits D2 – D6) to provide
the programmable blanking function. The blank timer is
BB
to act as a reservoir to operate the high-side
BB
FUNCTIONAL DESCRIPTION (continued)
to drive the source-
DD
REG
, the UVLO
) the outputs of
DMOS Full-Bridge PWM Motor Driver
reset when ENABLE is chopped or PHASE is changed. For
external PWM control, a PHASE change or ENABLE on
will trigger the blanking function.
Synchronous Rectifi cation. When a PWM off cycle
is triggered, either by an ENABLE chop command or
internal fi xed off-time cycle, load current will recirculate
according to the decay mode selected by the control logic.
The A3958 synchronous rectifi cation feature will turn on
the opposite pair of DMOS outputs during the current decay
and effectively short out the body diodes with the low r
driver. This will reduce power dissipation signifi cantly and
can eliminate the need for external Schottky diodes.
Synchronous rectifi cation can be confi gured in active mode,
passive mode, or disabled via the serial port (bits D11 and
D12).
The active or passive mode selection has no impact in slow-
decay mode. With synchronous rectifi cation enabled, the
slow-decay mode serves as an effective brake mode.
Current Regulation. Load current is regulated by an
internal fi xed off-time PWM control circuit. When the
outputs of the DMOS H bridge are turned on, the current
increases in the motor winding until it reaches a trip value
determined by the external sense resistor (R
analog reference voltage (V
and serial data bit D16:
At the trip point, the sense comparator resets the source-
enable latch, turning off the source driver. The load
inductance then causes the current to recirculate for the
serial-port-programmed fi xed off-time period. The current
path during recirculation is determined by the confi guration
of slow/mixed current-decay mode (D17) and the
synchronous rectifi cation control bits (D11 and D12).
When RANGE = D16 ....................... I
When RANGE ≠ D16 ......................... I
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Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
REF
), the RANGE logic level,
TRIP
TRIP
S
), the applied
= V
= V
REF
REF
/10R
/5R
DS(on)
S
S
7