A3980KLP Allegro Microsystems Inc, A3980KLP Datasheet - Page 10

• Manufacturer Part Number: A3980KLP
• Description: IC DRIVER MICROSTEPPING 28-TSSOP
• Manufacturer: Allegro Microsystems Inc

Specifications of A3980KLP

• Applications: Stepper Motor Driver
• Number Of Outputs: 1
• Current - Output: ± 1A
• Voltage - Load: 7 V ~ 50 V
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP Exposed Pad, 28-eTSSOP, 28-HTSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

A3980
Device Operation.
ping motor driver with a built-in translator for easy operation
with minimal control lines. It is designed to operate bipolar
stepper motors in full-, half-, eighth-, and sixteenth-step
modes. The currents in each of the two output full-bridges
and all of the N-channel DMOS FETs are regulated with
fi xed off-time PMW (pulse width modulated) control cir-
cuitry. At each step, the current for each full-bridge is set by
the value of its external current-sense resistor (R
reference voltage (V
(which in turn is controlled by the output of the translator).
At power-up, the translator resets to the Home state, in which
the motor is driven to the Home microstep position, where
both phase currents are set to +70%. Then the translator sets
the voltage regulator to mixed decay mode for both phases.
When a step command signal occurs on the STEP input, the
translator automatically sequences the DACs to the next
level and current polarity. (See table 3 for the current-level
sequence.) The microstep resolution is set by the combined
effect of inputs MS1 and MS2, as shown in table 1.
When stepping, if the new output levels of the DACs are
lower than their previous output levels, then the decay mode
(fast, slow, or mixed decay) for the active full-bridge is set
by the PFD input. If the new output levels of the DACs are
higher than or equal to their previous levels, then the decay
mode for the active full-bridge is set to slow decay. This
automatic current decay selection improves microstepping
performance by reducing the distortion of the current wave-
form that results from the back EMF of the motor.
Home Microstep Position.
a UVLO (undervoltage lockout) condition caused by low
voltage on V
to the Home microstep position. This corresponds to the 45°
position, which is the step where both phase currents are
+70%. Referring to table 3, for full-step mode this is step
1, for half-step this is step 2, for eighth-step this is step 5,
and for sixteenth-step this is step 9. In table 3 and fi gures 5
through 8, the Home microstep position is indicated.
Step Input
input sequences the translator and advances the motor one
DD
(STEP)
, the translator in the A3980 resets the motor
REF
.
A low-to-high transition on the STEP
), and the output voltage of its DAC
The A3980 is a complete microstep-
At power-up, or after
Functional Description
Automotive DMOS Microstepping Driver
S1
or R
S2
), a
increment. The translator controls the input to the DACs and
the direction of current fl ow in each winding. The size of
the increment is determined by the combined state of inputs
MS1 and MS2.
Microstep Select
stepping format, as shown in table 1. Any changes made to
these inputs do not take effect until the next STEP rising edge.
Direction Input
rotation of the motor. When low, the direction will be clock-
wise and when high, counterclockwise. Changes to this input
do not take effect until the next STEP rising edge.
Internal PWM Current Control.
controlled by a fi xed off-time PWM current control circuit
that limits the load current to a desired value, I
a diagonal pair of source and sink DMOS FETs are enabled
and current fl ows through the motor winding and the current
sense resistor, R
DAC output voltage, the current sense comparator resets the
PWM latch. The latch then turns off either the source DMOS
(when in slow decay mode) or the sink and source DMOSs
(when in fast or mixed decay modes).
The transconductance function is approximated by the maxi-
mum value of current limiting, I
where R
is the input voltage on the REF pin (V).
The DAC output reduces the V
sense comparator in precise steps, such that
(See table 3 for %I
It is critical that the maximum rating (0.5 V) on the SENSE
pin is not exceeded. For full-step mode, V
up to the maximum rating of V
value is 70% of maximum:
S
is the resistance of the sense resistor (Ω) and V
I
trip
S
= (%I
. When the voltage across R
I
TripMAX
TripMAX
(DIR). This determines the direction of
V
(MS1 and MS2). Selects the micro-
TripMAX
REF
= V
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
at each step.)
×
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
(0.707 ⁄ 8)
REF
DD
REF
⁄ 100)
TripMAX
, because the peak sense
with Translator
⁄ (8
output to the current
×

Each full-bridge is
I
R
(A), which is set by
TripMAX
REF
S
)
S
can be applied
TRIP
equals the
. Initially,
REF
10