A8904SLB Allegro Microsystems Inc, A8904SLB Datasheet - Page 16

• Manufacturer Part Number: A8904SLB
• Description: IC CTRLR/DRIVER DC MOTOR 24SOIC
• Manufacturer: Allegro Microsystems Inc

Specifications of A8904SLB

• Applications: DC Motor Driver, Brushless (BLDC), 3 Phase
• Number Of Outputs: 1
• Current - Output: ±1.4A
• Voltage - Load: 4 V ~ 14 V
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -20°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

the three motor windings to ground. This is accomplished by
turning the three source drivers OFF and the three sink drivers
ON. Activation of the brake can be implemented through the
BRAKE input or through the D2 bit in the serial port.
sine-wave voltage generators, 120° out of phase, where the
voltage developed by each of the windings is proportional to the
motor speed and constant. The current through any sink driver is
simply the generated voltage divided by the center tap to OUT
resistance plus the sink driver resistance. As the motor tends to
slow during the braking process, both the generated voltage and
the corresponding current decreases.
plied, it is important to characterize the application to ensure
that when braking is applied, the peak current in the sink drivers
does not exceed 3A and the period from the peak current to the
maximum current limit of the drivers does not exceed 800 ms.
Another consideration is the thermals of the solution, where
repeated spin-up followed by brake cycles could cause excessive
junction temperatures.
charge pump supply capacitor, C
220 nF, the brake circuit will function for at least 100 ms after a
power failure.
include a brake delay to allow sensitive circuitry such as the disk
head to retract before activating the spindle motor brake. The
brake delay can be simply implemented by using an external RC
and diode to control the brake terminal.
The brake delay can be set using the equation:
main active until the supply rails fall below the operating range.
It is recommended that the part is reset before restarting.
tion of the motor be connected to the CENTERTAP terminal. If
the centertap of the motor is not connected to the CENTERTAP
terminal, the A8904 internally emulates the centertap voltage of
A8904
Braking. A dynamic braking feature of the A8904 shorts
During braking, the motor is effectively acting as three
When selecting a motor to use where braking will be ap-
The supply voltage for the brake circuit is derived from the
In certain applications such as disk drives, it is desirable to
Once the brake is activated, the three sink drivers will re-
Centertap. It is recommended that the centertap connec-
t
BRK
= –R
B
C
B
x ln (V
RES
BRK
. With C
/ [V
FAULT
3-Phase Brushless DC Motor Controller/Driver
RES
Functional Description (cont’d)
– V
chosen to be
D
]).
the motor through a series of 10 k resistors connected between
each output and CENTERTAP. This technique does not provide
ideal commutation points.
be rated to at least 25 V and the dielectric should be X7R, apart
from the start-up capacitor C
or equivalent and the input capacitor C
electrolytic type of value greater than 100 μF, 35 V, I
mA. If the solution experiences ambient temperatures of greater
than 70°C then C
ence is an issue, or to stabilize the current waveforms with cer-
tain motors, it may be necessary to add RC snubbers across the
motor windings as shown in the application circuit on the next
page. The A8904 solution should be relatively noise immune
from the effects of switching voltage spikes etc. if the correct
watchdog capacitor has been selected for optimum blanking and
good layout practices are implemented.
are drawn out of the load supply, it is the capacitance reactance
as opposed to the ESR that dominates the overall impedance of
the input fi lter, C
ed electromagnetic emissions further, by simply increasing the
value of C
sary to introduce a differential mode inductor in series with the
load supply line.
has three separate ground connections, analog, digital, and pow-
er that must be connected together externally. A ground plane
should be used to provide heat sinking for the power switches
and the reduction of potential noise pick-up through inductive
loops and radiated emissions. The ground plane should cover the
area beneath the A8904 and extend beyond the outline to form a
plane around all the external components. The exposed thermal
pad of the TSSOP part should be connected to the ground plane.
capacitors should be positioned as close as possible to the device
terminals. It is also imperative that the traces to the serial port
and oscillator are as short and as wide as possible to reduce stray
inductance and prevent potential data corruption. In addition,
these traces should be positioned well away from any noisy
signals.
External component selection. All capacitors should
All resistors are at least 1/8 W and have a tolerance of ±5%.
In noise-sensitive systems where electromagnetic interfer-
At the range of operating frequencies that the current pulses
Layout considerations. The TSSOP part (A8904SLP)
Filter components, especially C
fi lter.
In extremely sensitive systems, it may be neces-
fi lter
fi lter
with Back EMF Sensing
. Therefore, it is possible to reduce conduct-
should be rated for 105°C.
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
ST
, which can be Z5U dielectric
fi lter
fi lter
, timing, and delay
, which should be an
ripple
> 100
15