LT1248IS Linear Technology, LT1248IS Datasheet - Page 8

• Manufacturer Part Number: LT1248IS
• Description: IC PFC CTRLR AVERAGE CURR 16SOIC
• Manufacturer: Linear Technology

Specifications of LT1248IS

• Mode: Average Current
• Frequency - Switching: 300kHz
• Current - Startup: 250µA
• Voltage - Supply: 15.5 V ~ 27 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

LT1248
A
ripple fed back to the error amplifier is minimized. Note
that switching ripple on the high impedance lines could get
into the multiplier from the I
The LT1248 provides an internal 25k resistor in series with
the low impedance multiplier current input so that only a
capacitor from the I
noise. The maximum multiplier output current, which
limits the system line current, is set by the R
to the formula: I
Oscillator Frequency and Maximum Line
Current Settling
Oscillator frequency is set by R
tude is 5V and C
Typical discharging time for C
should always be determined first to set the maximum
multiplier output current for system line current limit. For
a 300W preregulator, with R
= 250 A. With a 4k resistor R
line current sense resistor R
• 4k)/R
where P
usually between 1.1 and 1.3 depending on efficiency and
resistor tolerance. With R
determined by: C
C
protection, the LT1248 provides a current limit compara-
tor. When the comparator trips at 0V, the GTDR pin quickly
goes low to shut off the MOS switch. A resistor divider
from V
line current sense resistor and the current limit is set by:
I
8
LINE
SET
C1 IS TO REJECT NOISE, CURRENT
LIMIT DELAY IS ABOUT 2 s.
PPLICATI
R
S
= [(7.5V/R1) + 50 A](R2/R
= 1.5/(100kHz • 15k) = 1nF. For optional double
= I
REF
S
–
+
. As a general rule, R
OUT(MAX)
M(MAX)
to R
K(1.414)P
S
• R
M(MAX)
SET
1.6k
0.2
SET
O
(Figure 2) senses the voltage across the
R2
R
is the maximum power output and K is
S
I
LINE
AC
REF
U
charging current is set by V
= 1.5/(Frequency • R
pin to GND is needed to filter out the
S
OUT(MAX)
• V
= 3.75V/R
Figure 2
10k
R1
I FOR ATIO
LINE(MIN)
SET
U
I
SET
PKLIM
S
AC
, the line current limit is: (I
S
REF
selected, C
SET
= 15k, I
SET
is chosen according to:
pin and cause instability.
S
C1
1nF
), where 50 A is I
from M
SET
and C
7.5V
= 1nF is 250ns. R
W
.
M(MAX)
PK
V
SET
SET
REF
LIM
OUT
SET
. Ramp ampli-
SET
). For 100kHz,
= 3.75V/15k
can then be
to the 0.2
according
REF
U
–
+
/R
PKLIM
1248 F02
SET
SET
M
.
.
With I
(I
Always use R
PK
secondary limit should be higher than the primary limit;
6.5A is good (5A for primary limit) for a 300W regulator.
When line current reaches the primary limit, V
keep the line current constant, and system stability is still
maintained by the current loop which is controlled by the
current amplifier. When line current reaches the second-
ary limit, the comparator controls the system and loop
hysteresis may occur and can cause audible noise.
Synchronization
The LT1248 can be synchronized to a frequency that is up
to 1.6 times the natural frequency. With a 200ns one-shot
timer on-chip, the LT1248 provides flexibility on the
synchronizing pulse width. Because the EN/SYNC pin also
serves the chip shutdown function, the pulses at the pin
should not go below 3V and must go below 5V with widths
greater than 200ns. The Figure 3 circuit will synchronize
the LT1248.
Overvoltage Protection
Because of the slow loop response necessary for power
factor correction, output overshoot can occur with sudden
load removal or reduction. To protect the power compo-
nents and output load, the LT1248 provides an overvolt-
age comparator which senses the output voltage and
quickly shuts off the current switch. In Figure 4, because
there is no DC current going through R3, R1 and R2 set the
regulator output DC level: V
R1 = 1M, R2 = 20k, V
LINE
LIM
• R
LINE
comparator is only for secondary protection. The
S
EN/SYNC
)/0.8mA.
and R
SET
VN2222
to set the primary line current limit. The
S
V
chosen, let R1 = 10k, then R2 =
REF
OUT
30k
1N4148
1N4685
3.6V
Figure 3
is 382V.
OUT
200k
= V
SYNC PULSE
AT LEAST 200ns
REF
[(R1 + R2)/R2], with
V
CC
1248 F03
OUT
drops to