LTC3566EUF#PBF Linear Technology, LTC3566EUF#PBF Datasheet - Page 25

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LTC3566EUF#PBF

Manufacturer Part Number
LTC3566EUF#PBF
Description
IC USB POWER MANAGER 24-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3566EUF#PBF

Applications
Handheld/Mobile Devices
Voltage - Supply
4.35 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC3566EUF#PBFLTC3566EUF
Manufacturer:
LT
Quantity:
10 000
Company:
Part Number:
LTC3566EUF#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LTC3566EUF#PBFLTC3566EUF#TRPBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Company:
Part Number:
LTC3566EUF#PBFLTC3566EUF-2
Manufacturer:
LT
Quantity:
10 000
APPLICATIONS INFORMATION
A Type III compensation network attempts to introduce
a phase bump at a higher frequency than the LC double
pole. This allows the system to cross unity gain after the
LC double pole, and achieve a higher bandwidth. While
attempting to cross over after the LC double pole, the
system must still cross over before the boost right-half
plane zero. If unity gain is not reached suffi ciently before
the right-half plane zero, then the –180° of phase lag from
the LC double pole combined with the –90° of phase lag
from the right-half plane zero will result in negating the
phase bump of the compensator.
The compensator zeros should be placed either before
or only slightly after the LC double pole such that their
positive phase contributions offset the –180° that occurs
at the fi lter double pole. If they are placed at too low of a
frequency, they will introduce too much gain to the system
and the crossover frequency will be too high. The two high
frequency poles should be placed such that the system
crosses unity gain during the phase bump introduced by
the zeros and before the boost right-half plane zero and
such that the compensator bandwidth is less than the
bandwidth of the error amp (typically 900 kHz). If the gain
of the compensation network is ever greater than the gain
of the error amplifi er, then the error amplifi er no longer
acts as an ideal op amp, another pole will be introduced
and at the same point.
Figure 6. Error Amplifi er with Type I Compensation
ERROR
AMP
+
V
FB1
0.8V
C1
C
P1
V
3566 F06
OUT1
R1
R
FB
Recommended Type III compensation components for a
3.3V output:
R1: 324kΩ
R
C1: 10pF
R2: 15kΩ
C2: 330pF
R3: 121kΩ
C3: 33pF
C
L
Printed Circuit Board Layout Considerations
In order to be able to deliver maximum current under all
conditions, it is critical that the Exposed Pad on the back-
side of the LTC3566 family package be soldered to the PC
board ground. Failure to make thermal contact between
the Exposed Pad on the backside of the package and the
copper board will result in higher thermal resistances.
Furthermore, due to its high frequency switching circuitry,
it is imperative that the input capacitors, inductors, and
output capacitors be as close to the LTC3566 family as
OUT
OUT
FB
: 105kΩ
: 2.2μH
: 22μF
Figure 7. Error Amplifi er with Type III Compensation
ERROR
AMP
+
LTC3566/LTC3566-2
V
FB1
0.8V
C1
R2
C1
C2
V
3566 F07
OUT1
R1
R
FB
R3
C3
25
3566fb

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