MAX5039EUA+ Maxim Integrated Products, MAX5039EUA+ Datasheet - Page 15

• Manufacturer Part Number: MAX5039EUA+
• Description: IC CNTRLR VOLT TRACK 8-MSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5039EUA+

• Applications: Processor
• Current - Supply: 1.3mA
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 12. Normalized Thermal Transient Impedance
From step 5: the maximum V
voltage = (I
= 360mV.
From step 6 (first bullet): power dissipation = I
R
From step 6 (second bullet): power dissipation = (V
V
From step 6 (third bullet): power dissipation = I
R
So, the worst-case power dissipation in the MOSFET is
6W for a maximum duration of 20ms. From the
Si9428DY data sheet, under the normalized thermal
transient impedance curve (Figure 12), the Z
x +70°C/W for a single pulse. The worst-case junction
temperature of the MOSFET at +85°C ambient temper-
ature is:
See the application circuit examples in Figures 9 and 10.
The following explains constraints on the CORE voltage.
The high-side constraint requires that the CORE regula-
tor maintain a minimum voltage during normal opera-
tion. The low-side limit requires that the CORE regulator
hold the CORE voltage such that the voltage difference
from I/O to CORE does not exceed the processor’s
maximum allowable voltage difference:
CORE
DS(ON)
DS(ON)
0.01
) x I
0.1
2
1
0.0001
= +85°C + 6W x 0.05 x +70°C/W = +106°C
= (6A)
= (3A)
CORE
CORE(LIM)
DUTY CYCLE = 0.5
0.2
0.1
0.05
0.02
SINGLE PULSE
Programming the CORE Voltage
2
2
x 0.04Ω x 1.5 = 2.16W.
= (3.3V - 1.8V) x 4A = 6W.
x 0.04Ω x 1.5 = 0.54W.
T
J
______________________________________________________________________________________
= T
) x (R
AMB
0.001
DS(ON)
+ P
I/O
NORMALIZED THERMAL TRANSIENT IMPEDANCE, JUNCTION TO AMBIENT
PULSE
and V
) = 6A x 0.04Ω x 1.5
x Z
0.01
Voltage-Tracking Controllers for
CORE
θJA
θJA
differential
PSLIM
is 0.05
I/O
PowerPC, DSPs, and ASICs
SQUARE WAVE PULSE DURATION (s)
I/O
2
2
0.1
x
x
-
To calculate the high-side limit, set the maximum CORE
voltage set point at the minimum system CORE voltage
minus the total system tolerance:
Calculate the low-side constraint by taking the maxi-
mum system I/O voltage, subtracting the maximum
allowable I/O to CORE difference and adding the total
system tolerance.
The following comprise the sources for the total
system tolerance:
•
•
•
•
•
For example:
•
•
•
•
Resistor resolution error
Resistor tolerance error
Resistor temperature drift (TCR) error
MAX5039/MAX5040 reference error
Loop-gain error
V
V
Maximum voltage that I/O can exceed CORE
without damage to the processor:
System minimum gain = 1000V/V
CORE
I/O
CORESET
= 3.300 ±5%
1
∆V
= 1.800 ±5%
CORESET
I/OC
(TOL = Total Tolerance)
MIN
= (V
MAX
= I/O
I/O
1 0
1. DUTY CYCLE, D =
2. PER UNIT BASE = R
3. T
4. SURFACE MOUNTED
NOTES:
- V
P
= CORE
DM
JM
MAX
CORE
- T
A
t
= P
- ∆V
1
)
DM
t
MIN
MAX
2
Z
I/OC
thJA (t)
100
thJA
- TOL
= 2V
t
t
+ TOL
1
2
= +
70°C/W
600
15