LTC1923EGN Linear Technology, LTC1923EGN Datasheet - Page 11

IC CONTROLLER TEC HI EFF 28SSOP

LTC1923EGN

Manufacturer Part Number
LTC1923EGN
Description
IC CONTROLLER TEC HI EFF 28SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC1923EGN

Applications
Thermoelectric Cooler/Heater
Current - Supply
2mA
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1923EGN
Quantity:
6
Part Number:
LTC1923EGN
Manufacturer:
LINEAR/凌特
Quantity:
20 000
OPERATIO
MAIN CONTROL LOOP
The LTC1923 uses a constant frequency, voltage mode
architecture to control temperature. The relative duty
cycles of two pairs of N-/P-channel external MOSFETs, set
up in a full-bridge (also referred to as an H-bridge)
configuration are adjusted to control the system tempera-
ture. The full-bridge architecture facilitates bidirectional
current flow through a thermoelectric cooler (TEC) or
other heating element. The direction of the current flow
determines whether the system is being heated or cooled.
Typically a thermistor, platinum RTD or other appropriate
element is used to sense the system temperature. The
control loop is closed around this sense element and TEC.
The voltage on the output of the error amplifier, EAOUT,
relative to the triangle wave on C
TEC will be heating or cooling. A schematic of the external
full bridge is shown in Figure 1. The “A” side of the bridge
is comprised of the top left PMOS, MPA, and lower right
NMOS, MNA. The gates of these devices are attached to
the PDRVA and NDRVA outputs of the LTC1923, respec-
tively. The “B” side of the bridge is comprised of PMOS,
MPB and NMOS, MNB. The gates of these MOSFETs are
controlled by the PDRVB and NDRVB outputs of the
LTC1923.
The “A” side of the bridge is turned on (NDRVA is high and
PDRVA is low) when the output of the error amplifier is
less than the voltage on the C
NDRVB
PDRVB
NDRVA
PDRVA
TEC
TEC
CS
CS
+
+
Figure 1. Full-Bridge Schematic
U
MPA
MNB
R
3
4
S
1
2
+
T
V
pin as shown in Figure 2.
TECOOLER
V
TEC
T
DD
, controls whether the
1923 F01
MPB
MNA
For this condition, the state of each output driver is as
follows: PDRVA is low, NDRVA is high, PDRVB is high and
NDRVB is low. When the voltage on EAOUT is greater than
the voltage on the C
turned on. The average voltage across the TEC, V
is approximately:
where
Duty cycle terms D
equation:
In steady-state, the polarity of V
the system is being heated or cooled. Typically, when
current flows into the TEC
is being cooled and heated when current flows out of this
terminal. Note: Do not confuse the TEC
with the TEC
points should be connected together .
Figure 2. Error Amplifier Output, C
NDRVA
NDRVB
PDRVB
EAOUT
PDRVA
V
V
V
D
amount of time the “A” side is on divided by the
oscillator period
D
D
TECOOLER
DD
TECOOLER
A
B
A
C
T
= the duty cycle of the “A” side of the bridge or the
= the duty cycle of the “B” side of the bridge
= 1 – D
= the full-bridge supply voltage
+
B
SIDE
= V
= V
ON
input of the LTC1923, although these two
A
TEC
TEC
A
+
+
T
and D
SIDE
ON
– V
– V
B
pin, the “B” side of the bridge is
TEC
TEC
+
B
side of the cooler, the system
are related by the following
= V
T
TECOOLER
and Output Driver Waveforms
DD
• (D
indicates whether
+
A
LTC1923
side of the TEC
– D
B
)
TECOOLER
11
1923 F02
1923f
,

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