MAX8819BETI+T Maxim Integrated Products, MAX8819BETI+T Datasheet - Page 25

• Manufacturer Part Number: MAX8819BETI+T
• Description: IC PMIC W/INT CHARGER 28-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX8819BETI+T

• Applications: Handheld/Mobile Devices
• Voltage - Supply: 2.6 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4) During the μP’s boot-up sequence, it asserts EN123
5) After the μP has booted, it asserts EN4 to turn on the
6) CEN is asserted by the μP to start a charge cycle.
7) The external supply is removed from DC and V
8) System is turned off by deasserting EN123, EN4, and
Figure 7. MAX8819C Enable/Disable Waveforms Example
input of the system μP, the processor can begin its
boot-up sequence up at this time.
to keep the step-down converters enabled, even if
DC is removed.
display’s backlight.
falls. The converters remain enabled because the μP
has asserted EN123 and EN4, but the battery charg-
ing current drops to zero even though CEN is still
asserted. CHG goes high impedance.
CEN; RST1 goes low to reset the μP.
PMIC with Integrated Chargers and Smart
______________________________________________________________________________________
NOTES
Power Selector in a 4mm x 4mm TQFN
V
V
V
V
V
V
V
V
V
EN123
V
OUT3
OUT2
OUT1
RST1
OUT4
V
CHG
SYS
CEN
EN4
DC
1
t
SS-D-S
V
BAT
2
V
SYS
3
- V
D
t
SS3
V
BAT
SYS
< V
t
SS2
SYS
t
SS1
< V
DC
Figure 7 notes:
1) The MAX8819C is off with no external power applied
2) An external supply is applied to DC that causes the
3) EN123 is pulled high to start the OUT3, OUT2, and
to DC. The system voltage (V
tery voltage (V
step-down regulator to power up after the DC-to-
SYS soft-start time (t
valid and DC is not suspended, V
OUT1 power-up sequence. When OUT1 reaches the
reset trip threshold (V
delay timer starts. When the reset deassert delay
timer expires (t
impedance. If RST1 is connected to the RESET input
of the system μP, the processor can begin its boot-
up sequence at this time.
4
HIGH IMPEDANCE
t
DRST1
t
5
SS_CHG
t
SS4
6
BAT
DRST1
V
BAT
).
SS-D-S
7
200ms typ.), RST1 goes high-
THRST
V
SYS
). When the DC input is
- V
SYS
), the reset deassert
D
) is equal to the bat-
SYS
rises.
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