MCP98242T-BE/ST Microchip Technology, MCP98242T-BE/ST Datasheet - Page 11

IC MEMORY MOD TEMP SENSOR 8TSSOP

MCP98242T-BE/ST

Manufacturer Part Number
MCP98242T-BE/ST
Description
IC MEMORY MOD TEMP SENSOR 8TSSOP
Manufacturer
Microchip Technology

Specifications of MCP98242T-BE/ST

Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Register Bank
Sensor Type
Internal
Sensing Temperature
-40°C ~ 125°C
Output Type
I²C™/SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Temperature Threshold
Programmable
Full Temp Accuracy
3 C
Digital Output - Bus Interface
I2C, SMBus
Digital Output - Number Of Bits
10 bit
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 20 C
Supply Current
500 uA
Ic Output Type
Digital
Sensing Accuracy Range
± 3°C
Temperature Sensing Range
-40°C To +125°C
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Sensor Case Style
TSSOP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.0
4.1
The MCP98242 serial clock input (SCLK) and the
bidirectional serial data line (SDA) form a 2-wire
bidirectional SMBus/Standard mode I
communication port (refer to the
Characteristics
Interface Timing Specifications
The following bus protocol has been defined:
TABLE 4-1:
 2010 Microchip Technology Inc.
Master
Slave
Transmitter Device sending data to the bus.
Receiver
Start
Stop
Read/Write A read or write to the MCP98242
ACK
NAK
Busy
Not Busy
Data Valid
Term
SERIAL COMMUNICATION
2-Wire SMBus/Standard Mode
I
Interface
2
C™ Protocol-Compatible
The device that controls the serial bus,
typically a microcontroller.
The device addressed by the master,
such as the MCP98242.
Device receiving data from the bus.
A unique signal from master to initiate
serial interface with a slave.
A unique signal from the master to
terminate serial interface from a slave.
registers.
A receiver Acknowledges (ACK) the
reception of each byte by polling the
bus.
A receiver Not-Acknowledges (NAK) or
releases the bus to show End-of-Data
(EOD).
Communication is not possible
because the bus is in use.
The bus is in the Idle state, both SDA
and SCLK remain high.
SDA must remain stable before SCLK
becomes high in order for a data bit to
be considered valid. During normal
data transfers, SDA only changes state
while SCLK is low.
Table and
MCP98242 SERIAL BUS
PROTOCOL DESCRIPTIONS
Sensor And EEPROM Serial
Description
Table).
Input/Output Pin DC
2
C compatible
4.1.1
Data transfers are initiated by a Start condition (Start),
followed by a 7-bit device address and a read/write bit.
An Acknowledge (ACK) from the slave confirms the
reception of each byte. Each access must be
terminated by a Stop condition (Stop).
Repeated communication is initiated after t
This device does not support sequential register read/
write. Each register needs to be addressed using the
Register Pointer.
This device supports the Receive Protocol. The
register can be specified using the pointer for the initial
read. Each repeated read or receive begins with a Start
condition and address byte. The MCP98242 retains the
previously selected register. Therefore, it outputs data
from the previously-specified register (repeated pointer
specification is not necessary).
4.1.2
The bus is controlled by a master device (typically a
microcontroller) that controls the bus access and
generates the Start and Stop conditions. The
MCP98242 is a slave device and does not control other
devices in the bus. Both master and slave devices can
operate as either transmitter or receiver. However, the
master device determines which mode is activated.
4.1.3
A high-to-low transition of the SDA line (while SCLK is
high) is the Start condition. All data transfers must be
preceded by a Start condition from the master. If a Start
condition is generated during data transfer, the
MCP98242 resets and accepts the new Start condition.
A low-to-high transition of the SDA line (while SCLK is
high) signifies a Stop condition. If a Stop condition is
introduced during data transmission, the MCP98242
releases the bus. All data transfers are ended by a Stop
condition from the master.
4.1.4
Following the Start condition, the host must transmit an
8-bit address byte to the MCP98242. The address for
the
‘0011,A2,A1,A0’ in binary, where the A2, A1 and A0
bits are set externally by connecting the corresponding
pins to V
ted in the serial bit stream must match the selected
address for the MCP98242 to respond with an ACK. Bit
8 in the address byte is a read/write bit. Setting this bit
to ‘1’ commands a read operation, while ‘0’ commands
a write operation (see
MCP98242
DD
DATA TRANSFER
MASTER/SLAVE
START/STOP CONDITION
ADDRESS BYTE
‘1’ or GND ‘0’. The 7-bit address transmit-
Figure
Temperature
MCP98242
4-1).
DS21996D-page 11
Sensor
B-FREE
.
is

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