TCN75-5.0MOA Microchip Technology, TCN75-5.0MOA Datasheet - Page 12

• Manufacturer Part Number: TCN75-5.0MOA
• Description: IC TEMP SENSOR SRL 5.0V 8SOIC
• Manufacturer: Microchip Technology

Specifications of TCN75-5.0MOA

• Package / Case: 8-SOIC (3.9mm Width)
• Output Type: 2-Wire Serial
• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Temperature Threshold: Programmable
• Full Temp Accuracy: 3 C
• Digital Output - Bus Interface: 2-Wire
• Digital Output - Number Of Bits: 9 bit
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Description/function: 2-Wire Serial Input/Output - Thermal Monitors
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Supply Current: 1 mA
• Ic Output Type: Logic
• Sensing Accuracy Range: ± 0.5°C
• Supply Voltage Range: 2.7V To 5.5V
• Sensor Case Style: SOIC
• No. Of Pins: 8
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Temperature Sensing Range: -55°C To +125°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 158-1010; 158-1010

TCN75
FIGURE 5-1:
DS21490C-page 12
Master
Master
Master
Start
Start
Start
(c) Typical 1-Byte Read From Configuration Register with Preset Pointer
by
by
by
(a) Typical 2-Byte Read From Preset Pointer Location Such as Temp, T OS , T HYST
(b) Typical Pointer Set Followed by Immediate Read for 2-Byte Register Such as Temp, T OS , T HYST
1
1
1
1
1
1
Repeat
Master
0
0
0
Start
by
Address Byte
Address Byte
Address Byte
0
0
0
1 A2 A1 A0
1 A2 A1 A0 R/W
1 A2 A1 A0 R/W
1
1
0
Timing Diagrams
Address Byte
0
1 A2 A1 A0 R/W
R/W
TCN75T
TCN75
TCN75
Ack
Ack
Ack
by
by
by
9
9
9
D7 D6 D5
D7 D6 D5 D4 D3 D2 D1 D0
0
1
1
1
Most Significant Data Byte
0
TCN75
Ack
Pointer Byte
0
by
9
Data Byte
D4
D7 D6 D5 D4 D3 D2 D1 D0
0
1
Most Significant Data Byte
D3 D2 D1 D0
0
0 D1 D0
TCN75
Master
Ack
Ack
by
by
No Ack
9
9
9
Master
by
D7 D6 D5 D4 D3 D2 D1 D0
1
. . . . .
. . . . .
Least Significant Data Byte
Master
Cond
Stop
Master
by
Ack
by
9
D7 D6 D5 D4 D3 D2 D1 D0
1
Least Significant Data Byte
© 2006 Microchip Technology Inc.
No Ack
Master
9
by
Master
Cond
Stop
by
No Ack
Master
9
by
Master
Cond
Stop
by