ADM1032ARMZ-REEL ON Semiconductor, ADM1032ARMZ-REEL Datasheet - Page 4

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ADM1032ARMZ-REEL

Manufacturer Part Number
ADM1032ARMZ-REEL
Description
IC TEMP MONITOR 85DEG 8MSOP
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADM1032ARMZ-REEL

Function
Temp Monitoring System (Sensor)
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
0°C ~ 100°C, External Sensor
Output Type
SMBus™
Output Alarm
Yes
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Full Temp Accuracy
+/- 1 C, +/- 3 C
Digital Output - Bus Interface
Serial (2-Wire)
Maximum Operating Temperature
+ 120 C
Minimum Operating Temperature
0 C
Temperature Sensor Function
Temp Sensor
Interface Type
Serial (2-Wire)
Package Type
MSOP
Operating Temperature (min)
0C
Operating Temperature (max)
150C
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ELECTRICAL CHARACTERISTICS
1. See Table 6 for information on other conversion rates.
2. Guaranteed by design, not production tested.
3. The SMBus timeout is a programmable feature. By default, it is not enabled. Details on how to enable it are available in the Serial Bus
Serial Bus Timing (Note 2)
SDATA Output Low Sink Current
ALERT Output Low Sink Current
Logic Input Current, I
Input Capacitance, SCLK, SDATA
Clock Frequency
SMBus Timeout (Note 3)
SCLK Clock Low Time, t
SCLK Clock High Time, t
Start Condition Setup Time, t
Start Condition Hold Time, t
Stop Condition Setup Time, t
Data Valid to SCLK Rising Edge Time,
t
Data Hold Time, t
Bus Free Time, t
SCLK, SDATA Rise Time, t
SCLK, SDATA Fall Time, t
SU:DAT
Interface section.
SDATA
SCLK
Parameter
PS
BUF
t
HD:DAT
BUF
IH
, I
LOW
t
IL
HIGH
HD:STA
F
R
HD:STA
SU:STO
SU:STA
t
LOW
t
R
t
HD:DAT
Figure 2. Diagram for Serial Bus Timing
SDATA forced to 0.6 V
ALERT forced to 0.4 V
t
t
Time from 10% of SDATA to 90% of SCLK
Time from 90% of SCLK to 10% of SDATA
Time for 10% or 90% of SDATA to 10% of SCLK
Between start/stop condition
LOW
HIGH
between 10% points
between 90% points
t
HIGH
http://onsemi.com
t
F
t
SU:DAT
Conditions
4
S
t
SU:STA
t
HD:STA
−1.0
Min
600
600
600
100
300
6.0
1.0
1.3
0.6
1.3
t
Typ
5.0
SU:STO
25
Max
+1.0
400
300
300
64
P
Unit
kHz
mA
mA
ms
mA
pF
ms
ms
ns
ns
ns
ns
ns
ms
ns
ns

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