ADT7473ARQZ-1 ON Semiconductor, ADT7473ARQZ-1 Datasheet - Page 37

• Manufacturer Part Number: ADT7473ARQZ-1
• Description: IC THERM MON FAN CTRLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7473ARQZ-1

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Programming the PWM
minimum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the minimum
PWM duty cycle to be set in steps of 0.39%.
given by:
Example 1
For a minimum PWM duty cycle of 50%
Example 2
For a minimum PWM duty cycle of 33%
PWM
Register 0x64, PWM1 Minimum Duty Cycle = 0x80 (50%
default)
Register 0x65, PWM2 Minimum Duty Cycle = 0x80 (50%
default)
Register 0x66, PWM3 Minimum Duty Cycle = 0x80 (50%
default)
Note on Fan Speed and PWM Duty Cycle
speed in RPM. Running a fan at 33% PWM duty cycle does
not equate to running the fan at 33% speed. Driving a fan at
33% PWM duty cycle actually runs the fan at closer to 50%
of its full speed. This is because fan speed in %RPM
generally relates to the square root of PWM duty cycle.
Given a PWM square wave as the drive signal, fan speed in
RPM approximates to:
The PWM
The value to be programmed into the PWM
The PWM duty cycle does not directly correlate to fan
Figure 54. Operating Two Different Fans from a
Value (decimal) = PWM
Value (decimal) = 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Value (decimal) = 33/0.39 = 85 (decimal)
Value = 85 (decimal) or 54 (hex)
MIN
% fanspeed + PWM duty cycle
PWM2
PWM1
Registers
100%
MIN
MIN
0%
MIN
Single Temperature Channel
registers are 8−bit registers that allow the
T
MIN
MIN
PWM2
Registers
MIN
/0.39
PWM1
TEMPERATURE
10
MIN
register is
(eq. 4)
http://onsemi.com
37
Step 5: PWM
in the system runs under the automatic fan speed control
loop. For maximum system acoustic benefit, PWM
should be as low as possible, but should be capable of
maintaining the processor temperature limit at an acceptable
level. If the THERM temperature limit is exceeded, the fans
are still boosted to 100% for fail−safe cooling (see
Figure 55).
default value of this register is 0xFF and thus has no effect
unless it is programmed.
Programming the PWM
maximum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the maximum
PWM duty cycle to be set in steps of 0.39%.
is given by:
Example 1
For a maximum PWM duty cycle of 50%
Example 2
For a minimum PWM duty cycle of 75%
PWM
Register 0x38, PWM1 Maximum Duty Cycle = 0xFF
(100% default)
Register 0x39, PWM2 Maximum Duty Cycle = 0xFF
(100% default)
Register 0x3A, PWM3 Maximum Duty Cycle = 0xFF
(100% default)
Figure 55. PWM
PWM
There is a PWM
The PWM
The value to be programmed into the PWM
See the Note on Fan Speed and PWM Duty Cycle section.
Value (decimal) = PWM
Value (decimal) = 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Value (decimal) = 75/0.39 = 85 (decimal)
Value = 192 (decimal) or C0 (hex)
MAX
Cycle Below the THERM Temperature Limit
PWM
MAX
PWM
Registers
100%
MAX
MIN
0%
MAX
is the maximum duty cycle at which each fan
MAX
MAX
registers are 8−bit registers that allow the
for PWM (Fan) Outputs
MAX
T
Determines Maximum PWM Duty
MIN
MAX
limit for each fan channel. The
MAX
Registers
/0.39
TEMPERATURE
MAX
register
MAX