MC34060ADR2G ON Semiconductor, MC34060ADR2G Datasheet - Page 5

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MC34060ADR2G

Manufacturer Part Number
MC34060ADR2G
Description
IC CTRLR PWM FF SGL END 14-SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC34060ADR2G

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
200kHz
Duty Cycle
100%
Voltage - Supply
7 V ~ 40 V
Buck
Yes
Boost
Yes
Flyback
Yes
Inverting
Yes
Doubler
No
Divider
No
Cuk
No
Isolated
Yes
Operating Temperature
0°C ~ 70°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Frequency-max
200kHz
Topology
Flyback
Output Voltage
30 V
Output Current
200 mA
Switching Frequency
200 KHz
Duty Cycle (max)
96 %
Operating Supply Voltage
15 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Fall Time
40 ns
Mounting Style
SMD/SMT
Rise Time
100 ns
Synchronous Pin
No
Number Of Pwm Outputs
1
On/off Pin
No
Adjustable Output
No
Switching Freq
200KHz
Operating Supply Voltage (max)
40V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
14
Package Type
SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Description
modulation control circuit, incorporating the primary
building blocks required for the control of a switching power
supply (see Figure 1). An internal−linear sawtooth oscillator
is frequency−programmable by two external components,
R
determined by:
T
The MC34060A is a fixed−frequency pulse width
and C
Dead-Time
T
R
Control
. The approximate oscillator frequency is
For more information refer to Figure 3.
T
C
T
f
Dead-Time Control
osc
6
5
4
Feedback/P.W.M.
Comparator
^
Capacitor C
Error Amp
1
1
Output Q
R
Emitter
T
1.2
2
• C
T
+
-
1
T
,
1
≈ 0.7mA
Oscillator
0.12V
0.7V
Comparator Input
Feedback/PWM
This device contains 46 active transistors.
3
Figure 2. Timing Diagram
Figure 1. Block Diagram
http://onsemi.com
-
+
-
+
Comparator
Dead-Time
Comparator
PWM.
2
5
+
-
13
Error Amp
comparison of the positive sawtooth waveform across
capacitor C
enabled only during that portion of time when the sawtooth
voltage is greater than the control signals. Therefore, an
increase in control−signal amplitude causes a corresponding
linear decrease of output pulse width. (Refer to the Timing
Diagram shown in Figure 2.)
2
Output pulse width modulation is accomplished by
Undervoltage
14
Lockout
T
to either of two control signals. The output is
-
+
Reference
Regulator
7
GND
V
TH
Q1
10
12
8
9
Collector
Ref Out
Emitter
V
CC

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