MAX15004AAUE+T Maxim Integrated Products, MAX15004AAUE+T Datasheet - Page 21

IC PWR SUPPLY CNTRLR 16-TSSOP

MAX15004AAUE+T

Manufacturer Part Number
MAX15004AAUE+T
Description
IC PWR SUPPLY CNTRLR 16-TSSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX15004AAUE+T

Pwm Type
Current Mode
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
50%
Voltage - Supply
4.5 V ~ 40 V
Buck
No
Boost
Yes
Flyback
Yes
Inverting
No
Doubler
No
Divider
Yes
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
Frequency-max
1MHz
Duty Cycle (max)
50 %
Output Voltage
1.23 V to 100 V
Output Current
1000 mA
Mounting Style
SMD/SMT
Switching Frequency
15 KHz to 500 KHz
Operating Supply Voltage
4.5 V to 40 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Synchronous Pin
Yes
Topology
Boost, Flyback, Forward
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For the SEPIC configuration, choose an n-channel
MOSFET with a V
sum of the output and input voltages. When operating
at a high switching frequency, the gate charge and
switching losses become significant. Use low gate-
charge MOSFETs. The RMS current of the MOSFET is:
where I
Use Schottky diodes for higher conversion efficiency.
The reverse voltage rating of the Schottky diode must
be higher than the sum of the maximum input voltage
(V
current flowing through the diode is equal to the output
current, choose the diode with forward current rating of
I
using the current-limit threshold (0.305V) of
MAX15004/MAX15005 and I
ward current rating more than the maximum output cur-
rent limit if the SEPIC converter needs to be output
short-circuit protected.
Select R
Calculate the output current limit using the following
equation:
where D is the duty cycle at the highest input voltage
(V
OUT-MAX
I
MOS RMS
IN-MAX
IN-MAX
Flyback/Boost/SEPIC Power-Supply Controllers
MOSFET, Diode, and Series Capacitor Selection
LDC
).
) and the output voltage. Since the average
CS
. The current sense (R
( )
I
A
OUT LIM
= (I
20% below the value calculated above.
=
LPK
(
DS
I
______________________________________________________________________________________
LPK
- ΔI
=
rating at least 20% higher than the
R
)
2
L
CS
).
(
+
1
(
D
I
=
LDC
D
LPK
0 305
)
I
LPK
.
)
×
2
. Use a diode with a for-
(
+
I
in a SEPIC Converter
LPK
S
(
I
) can be calculated
LPK
×
Δ
I
I
LDC
L
)
4.5V to 40V Input Automotive
)
× ×
D
MAX
3
The series capacitor should be chosen for minimum rip-
ple voltage (ΔV
using a maximum ripple ΔV
input voltage (V
input voltage. The multilayer ceramic capacitor X5R and
X7R series are recommended due to their high ripple
current capability and low ESR. Use the following equa-
tion to calculate the series capacitor CP value.
where ΔV
For a further discussion of SEPIC converters, go to
http://pdfserv.maxim-ic.com/en/an/AN1051.pdf.
The MAX15004/MAX15005 maximum power dissipation
depends on the thermal resistance from the die to the
ambient environment and the ambient temperature. The
thermal resistance depends on the device package,
PCB copper area, other thermal mass, and airflow.
Calculate the temperature rise of the die using following
equation:
or
where θ
(3°C/W) of the 16-pin TSSOP-EP package and P
power dissipated in the device. Solder the exposed
pad of the package to a large copper area to spread
heat through the board surface, minimizing the case-to-
ambient thermal impedance. Measure the temperature
of the copper area near the device (T
condition of power dissipation and use 3°C/W as θ
thermal impedance. The case-to-ambient thermal
impedance (θ
transferred from the PCB to the ambient. Use a large
copper area to keep the PCB temperature low. The θ
is 38°C/W for TSSOP-16-EP and 90°C/W for TSSOP-16
package with the condition specified by the JEDEC51
standard for a multilayer board.
JC
CP
is the junction-to-case thermal impedance
is 0.05 x V
JA
CP
CP
IN-MIN
) is dependent on how well the heat is
) across the capacitor. We recommend
T
=
T
J
J
= T
= T
I
OUT MAX
) when operating at the minimum
IN-MIN
C
Δ
A
V
+ (P
+ (P
CP
CP
.
×
T
T
to be 5% of the minimum
×
x θ
x θ
f
Power Dissipation
OUT
D
JC
JA
MAX
)
)
C
) at worst-case
T
21
JC
JA
is

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