IR3621F International Rectifier, IR3621F Datasheet - Page 10

• Manufacturer Part Number: IR3621F
• Description: IC PWM DUAL SYNC PREBIAS 28TSSOP
• Manufacturer: International Rectifier

Specifications of IR3621F

• Pwm Type: Voltage Mode
• Number Of Outputs: 2
• Frequency - Max: 345kHz
• Duty Cycle: 86.5%
• Voltage - Supply: 5.5 V ~ 14.5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-TSSOP
• Frequency-max: 345kHz
• Package: 28-Pin TSSOP
• Circuit: Dual Sync PWM Controller or 2Phase Single Output
• Vcc (min): 4.7
• Vcc (max): 16
• Vout (min): 0.8
• Vout (max): Vcc * 0.90
• Switch Freq (khz): programmable to 500kHz
• Pbf: PbF Option Available
• For Use With: IRDC3621 - BOARD EVAL DUAL SYNC BUCK CTRLR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IR3621 & (PbF)
Frequency Synchronization
The IR3621 is capable of accepting an external digital
synchronization signal. Synchronization will be enabled
by the rising edge at an external clock. Per-channel switch-
ing frequency is set by external resistor (Rt). The free
running oscillator frequency is twice the per-channel fre-
quency. During synchronization, Rt is selected such that
the free running frequency is 20% below the sync fre-
quency. Synchronization capability is provided for both 2-
output and 2-phase configurations. When unused, the
Sync pin will remain floating and is noise immune.
Thermal Shutdown
Temperature sensing is provided inside IR3621. The trip
threshold is typically set to 140 C. When trip threshold is
exceeded, thermal shutdown turns off both MOSFETs.
Thermal shutdown is not latched and automatic restart is
initiated when the sensed temperature drops to normal
range. There is a 20 C hysteresis in the shutdown thresh-
old.
Power Good
The IR3621 provides a power good signal. The power good
signal should be available after both outputs have reached
regulation. This pin needs to be externally pulled high.
High state indicates that outputs are in regulation.
Power good will be low if either one of the output voltages
is 10% below the set value. There is only one power good
for both outputs.
Over-Voltage Protection OVP
Over-voltage is sensed through separate V
V
each output. Upon over-voltage condition of either one of
the outputs, the OVP forces a latched shutdown on both
outputs. In this mode, the upper FET drivers turn off and
the lower FET drivers turn on, thus crowbaring the out-
puts. Reset is performed by recycling Vcc.
Error Amplifier
The IR3621 is a voltage mode controller. The error ampli-
fiers are of transconductance type. In independent mode,
each amplifier closes the loop around its own output volt-
age. In current sharing mode, amplifier 1 becomes the
master which regulates the common output voltage. Am-
plifier 2 performs the current sharing function. Both am-
plifiers are capable of operating with Type III compensa-
tion control scheme.
10
SEN1
and V
SEN2
. A separate OVP circuit is provided for
OUT
sense pins
www.irf.com
Operation Frequency Selection
The optimum operating frequency range for the IR3621
is 300kHz per phase, theoretically the IR3621 can be
operated at higher switching frequency (e.g. 500kHz).
However the power dissipation for IC, which is function
of applied voltage, gate drivers load and switching fre-
quency, will result in higher junction temperature of de-
vice. It may exceed absolute maximum rating of junc-
tion temperature, figure 18 (page 17) shows case tem-
perature versus switching frequency with different ca-
pacitive loads for TSSOP package.
This should be considered when using IR3621 for such
application. The below equation shows the relationship
between the IC's maximum power dissipation and Junc-
tion temperature:
Where:
Tj: Maximum Operating Junction Temperature
TA: Ambient Temperature
The switching frequency is determined by an external
resistor (Rt). The switching frequency is approximately
inversely proportioned to resistance (see Fig 10).
Shutdown
The outputs can be shutdown independently by pulling
the respective soft-start pins below 0.3V. This can be
easily done by using an external small signal transis-
tor. During shutdown both MOSFETs will be turned off.
During this mode the LDO will stay on. Normal opera-
tion will resume by cycling soft start pins.
JA
Figure 10- Switching Frequency versus External Resistor.
= Thermal Impedance of package
700
600
500
400
300
200
100
0
0
Per Channel Switching Frequency vs. RT
10
Pd =
20
Τ
J-
JA
Τ
A
30
RT (kohm)
40
50
60
70