LTC3717EUH-1 Linear Technology, LTC3717EUH-1 Datasheet - Page 13

IC CTRLR STEP-DOWN SYNC 32QFN

LTC3717EUH-1

Manufacturer Part Number
LTC3717EUH-1
Description
IC CTRLR STEP-DOWN SYNC 32QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3717EUH-1

Applications
Controller, DDR, QDR
Voltage - Input
4 ~ 36 V
Number Of Outputs
1
Voltage - Output
2 ~ 18 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Linear Technology
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APPLICATIO S I FOR ATIO
250ns. The minimum off-time limit imposes a maximum
duty cycle of t
cycle is reached, due to a dropping input voltage for
example, then the output will drop out of regulation. The
minimum input voltage to avoid dropout is:
Output Voltage Programming
When V
regulated to one half of the voltage at the V
resistor connected between V
further adjust the output voltage according to the follow-
ing equation:
If V
with the V
input common mode range of the internal error amplifier.
To maintain the V
series with the V
the resistor in series with the V
External Gate Drive Buffers
The LTC3717-1 drivers are adequate for driving up to
about 30nC into MOSFET switches with RMS currents of
50mA. Applications with larger MOSFET switches or oper-
ating at frequencies requiring greater RMS currents will
benefit from using external gate drive buffers such as the
LTC1693. Alternately, the external buffer circuit shown in
Figure 5 can be used. Note that the bipolar devices reduce
the signal swing at the MOSFET gate.
V
V
REF
IN MIN
OUT
(
exceeds 3V, resistors should be placed in series
FB
)
REF
V
V
V
OUT
is connected to V
REF
REF
V
pin and the V
ON
OUT
REF
249k
499k
R
R
/(t
OUT
60
FB
FB
ON
U
t
120
k R
pin should be made twice as large as
ON
= V
V
V
+ t
FB
REF
k
REF
LTC3717-1
Figure 4
OFF(MIN)
FB
t
U
t
ON
OFF MIN
FB
/2 relationship, the resistor in
(
FB
OUT
pin to avoid exceeding the
37171 F04
FB
and V
). If the maximum duty
, the output voltage is
)
pin.
W
OUT
can be used to
REF
U
pin. A
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC3717-1 as well as a timer for soft-start and overcur-
rent latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC3717-1 into a low quiescent current shutdown
(I
current source to charge up the external timing capacitor
C
there is a delay before starting of about:
When the voltage on RUN/SS reaches 1.5V, the LTC3717-
1 begins operating with a clamp on I
0.9V. As the RUN/SS voltage rises to 3V, the clamp on I
is raised until its full 2.4V range is available. This takes an
additional 1.3s/ F, during which the load current is folded
back. During start-up, the maximum load current is re-
duced until either the RUN/SS pin rises to 3V or the output
reaches 75% of its final value. The pin can be driven from
logic as shown in Figure 6. Diode D1 reduces the start
delay while allowing C
start function.
TG
SS
Q
t
< 30 A). Releasing the pin allows an internal 1.2 A
3.3V OR 5V
. If RUN/SS has been pulled all the way to ground,
DELAY
Figure 6. RUN/SS Pin Interfacing with Latchoff Defeated
10
BOOST
SW
Figure 5. Optional External Gate Driver
D1
Q1
FMMT619
Q2
FMMT720
1 2
1 5
(6a)
.
.
V
V
IN
A
R
SS
C
*
RUN/SS
SS
GATE
OF M1
SS
to charge up slowly for the soft-
C
SS
1 3
. /
BG
s F C
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
TH
10
LTC3717-1
INTV
SS
DRV
PGND
of approximately
CC
R
D2*
Q3
FMMT619
Q4
FMMT720
CC
SS
(6b)
*
RUN/SS
sn37171 37171fs
37171 F06
13
C
37171 F05
GATE
OF M2
SS
TH

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