ADM8832ACPZ Analog Devices Inc, ADM8832ACPZ Datasheet - Page 6

• Manufacturer Part Number: ADM8832ACPZ
• Description: IC CHARGE PUMP REG TFT 20LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADM8832ACPZ

• Applications: Converter, TFT, LCD
• Voltage - Input: 2.6 ~ 3.6 V
• Number Of Outputs: 3
• Voltage - Output: -10.2V, 5.1V, 15.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-LFCSP
• Primary Input Voltage: 3.6V
• No. Of Outputs: 3
• Output Voltage: 15.3V
• Output Current: 50µA
• No. Of Pins: 20
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ADM8832EB-EVALZ - BOARD EVALUATION ADM8832 REG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADM8832
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11, 12
13, 14
15, 16
17
18
19, 20
Mnemonic
V
VOUT
LDO_IN
+5VOUT
+5VIN
LDO_ON/OFF
SHDN
SCAN/BLANK
CLKIN
+15VOUT
C3−, C3+
C2−, C2+
C4−, C4+
−10VOUT
GND
C1−, C1+
CC
Positive Supply Voltage Input. Connect this pin to 3 V supply with a 2.2 µF decoupling capacitor.
Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 µF capacitor to ground is required on
this pin.
Voltage Regulator Input. The user has the option to bypass this circuit using the LDO_ON/OFF pin.
+5.1 V Output Pin. This is derived by doubling and regulating the +3 V supply. A 2.2 µF capacitor to ground is
required on this pin to stabilize the regulator.
+5.1 V Input Pin. This is the input to the voltage tripler and doubler inverter charge pump circuits.
Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage
doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the
use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into
the voltage tripler and doubler/inverter circuits of the ADM8832.
Digital Input. 3 V CMOS logic. Active low shutdown control. This pin shuts down the timing generator and
enables the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V.
Drive Mode Input. 3 V CMOS logic. A logic high places the part in scan (high current) mode, and the charge
pump is driven by the internal oscillator. A logic low places the part in blanking (low current) mode, and the
charge pump is driven by the (slower) external oscillator. This is a power saving feature on the ADM8832.
External CLOCK Input. During a blanking period, the oscillator circuit selects this pin to drive the charge pump
circuit. This is at a lower frequency than the internal oscillator, resulting in lower quiescent current
consumption, thus saving power.
+15.3 V Output Pin. This is derived by tripling the +5.1 V regulated output. A 1 µF capacitor is required on
this pin.
External capacitor C3 is connected between these pins. A 1 µF capacitor is recommended.
External capacitor C2 is connected between these pins. A 1 µF capacitor is recommended.
External capacitor C4 is connected between these pins. A 1 µF capacitor is recommended.
−10.2 V Output Pin. This is derived by doubling and inverting the +5.1 V regulated output. A 1 µF capacitor is
required on this pin.
Device Ground Pin.
External capacitor C1 is connected between these pins. A 2.2 µF capacitor is recommended.
Function
+5VOUT
LDO_IN
VOUT
+5VIN
V
CC
Figure 2. Pin Configuration
1
2
3
4
5
Rev. A | Page 6 of 12
ADM8832
TOP VIEW
PIN 1
INDICATOR
15
14
13
12
11
C4–
C2+
C2–
C3+
C3–