MAX1584ETJ+T Maxim Integrated Products, MAX1584ETJ+T Datasheet - Page 28

IC DGTL CAM PWR-SUP 5CH 32TQFN

MAX1584ETJ+T

Manufacturer Part Number
MAX1584ETJ+T
Description
IC DGTL CAM PWR-SUP 5CH 32TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1584ETJ+T

Applications
Controller, Digital Camera
Voltage - Input
0.7 ~ 5.5 V
Number Of Outputs
5
Voltage - Output
1.25 ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5-Channel Slim DSC Power Supplies
event of an overload. Or, it can remove the load until
the supply reaches regulation, effectively allowing full-
load startup. Figure 15 shows such a connection for the
step-up output.
The step-down feedback voltage is 1.25V. With a stan-
dard two-resistor feedback network, the output voltage
can be set to values between 1.25V and the input volt-
age. If a step-down output voltage less than 1.25V is
desired, it can be set by adding a third feedback resis-
tor from FBSD to a voltage higher than 1.25V (the step-
up output is a convenient voltage for this) as shown in
Figure 16.
The equation governing output voltage in Figure 16’s
circuit is as follows:
where V
V
age that is higher than 1.25V can be used as the con-
nection point for R3 in Figure 16, and for the V
in the equation. Since there are multiple solutions for
R1, R2, and R3, the above equation cannot be written
in terms of one resistor. The best method for determin-
ing resistor values is to enter the above equation into a
Figure 15. SCF controls a PFET load switch to disconnect all
5V loads on fault. This also allows full-load startup.
28
0 = [(V
SU
CURRENT-MODE
OR FAULT
PWR-ON
______________________________________________________________________________________
is the step-up output voltage. Any available volt-
STEP-UP
V
(PARTIAL)
PWM
MAX1584
MAX1585
FBSD
SD
SD
OK
- V
) / R3]
is the output voltage, V
FBSD
) / R1] + [(0 - V
PVSU
PGSU
FBSD
LXSU
Setting SDOUT Below 1.25V
SCF
PV
L2
V
TO
BATT
FBSD
FBSD
) / R2] + [(V
is 1.25V, and
SD
SU
term
V
+5V
SU
-
spreadsheet and test estimated resistor values. A good
starting point is with 100kΩ at R2 and R3.
Good PC board layout is important to achieve optimal
performance from the MAX1584/MAX1585. Poor design
can cause excessive conducted and/or radiated noise.
Conductors carrying discontinuous currents and any
high-current path should be made as short and wide as
possible. A separate low-noise ground plane contain-
ing the reference and signal grounds should connect to
the power-ground plane at only one point to minimize
the effects of power-ground currents. Typically, the
ground planes are best joined right at the IC.
Keep the voltage-feedback network very close to the
IC, preferably within 0.2in (5mm) of the FB_ pin. Nodes
with high dV/dt (switching nodes) should be kept as
small as possible and should be routed away from
high-impedance nodes such as FB_. Refer to the
MAX1584/MAX1585 evaluation kit data sheet for a full
PC board example.
Figure 16. Setting PVSD for Outputs Below 1.25V
TRANSISTOR COUNT: 8234
PROCESS: BiCMOS
3.3V
V
SU
100kΩ
PVSU
PV
R3
CURRENT-MODE
FBSD
STEP-DOWN
V
1.25V
(PARTIAL)
MAX1584
MAX1585
FBSD
R2
100kΩ
56kΩ
R1
Designing a PC Board
Chip Information
PGSD
PVSD
LXSD
4.7μH
22μF
10μF
V
0.8V
SD

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