ADP3163JRUZ-REEL Analog Devices Inc, ADP3163JRUZ-REEL Datasheet - Page 12

• Manufacturer Part Number: ADP3163JRUZ-REEL
• Description: IC REG BUCK 5BIT 2-3PHAS 20TSSOP
• Manufacturer: Analog Devices Inc

Specifications of ADP3163JRUZ-REEL

• Applications: Controller, Intel Pentium® IV
• Voltage - Input: 5V, 12V
• Number Of Outputs: 1
• Voltage - Output: 1.1 ~ 1.85 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADP3163JRUZREELTR

ADP3163
Allocating half of the total dissipation for the four high-side
MOSFETs and half for the four low-side MOSFETs, and
assuming that the resistive and switching losses of the high-side
MOSFETs are equal, the required maximum MOSFET resis-
tances will be:
and:
Note that there is a trade-off between converter efficiency and
cost. Larger MOSFETs reduce the conduction losses and allow
higher efficiency, but increase the system cost. A Fairchild
FDB7030L (R
the high-side and a Fairchild FDB8030L (R
nominal, 5.6 m worst-case) for the low-side are good choices.
The high-side MOSFET dissipation is:
Where the first term is the conduction loss of the MOSFET, the
second term represents the turn-off loss of the MOSFET and
the third term represents the turn-on loss due to the stored
charge in the body diode of the low-side MOSFET. In the sec-
ond term, Q
turn-off and I
for the FDB7030L the value of Q
gate drive current provided by the ADP3414 is about 1 A. In
the third term, Q
the low-side MOSFET at the valley of the inductor current. The
data sheet of the FDB8030L does not give that information, so
an estimated value of 150 nC is used. This estimate is based on
information found on data sheets of similar devices. In both
terms, f
or 200 kHz. I
The worst-case low-side MOSFET dissipation is:
Note that there are no switching losses in the low-side MOSFET.
P
LSF
10
R
P
V
4 3 7 7
HSF
12
DS ON HSF
IN
R
2 3 20 4
m
9 06
(
DS ON LSF
V
.
R
SW
(
9 06
DS ON LSF
I
)
.
L PK
R
is the actual switching frequency of the MOSFETs,
(
W
.
(
150
7 7
2
)
DS ON HSF
G
.
L(PK)
G
W
A
is the gate charge to be removed from the gate for
)
DS(ON)
(
)
.
is the gate turn-off current. From the data sheet,
2
I
A
nC
G
4
A
2
RR
Q
)
is the peak current in the inductor, or 27 A.)
2
2
12 7
G
, is the charge stored in the body diode of
I
P
n I
LSF MAX
= 7 m nominal, 10 m worst-case) for
12
200
FET TOTAL
.
P
n I
3 63
FET TOTAL
(
f
V
.
m
SW
I
(
HSF MAX
HSF MAX
kHz
(
LSF MAX
m
)
29
(
2
(
V
(
)
IN
A
5 6
)
G
2 17
.
)
2
2 1
)
.
2
is about 35 nC and the peak
)
m
2
35
Q
RR
W
nC
A
20 4
DS(ON)
f
.
SW
200
A
2
kHz
= 3.1 m
2 33
.
+
W
(21)
(22)
(23)
(24)
C
In continuous inductor-current mode, the source current of the
high-side MOSFET is approximately a square wave with a duty
ratio equal to V
maximum output current. To prevent large voltage transients, a
low ESR input capacitor sized for the maximum rms current
must be used. The maximum rms capacitor current is given by:
Note that the capacitor manufacturer’s ripple current ratings are
often based on only 2000 hours of life. This makes it advisable
to further derate the capacitor, or to choose a capacitor rated at
a higher temperature than required. Several capacitors may be
placed in parallel to meet size or height requirements in the
design. In this example, the input capacitor bank is formed by
three 270 F, 16 V OS-CON capacitors with a ripple current
rating of 4.4 A each.
The ripple voltage across the three paralleled capacitors is:
V
Multilayer ceramic input capacitors are also required. These
capacitors should be placed between the input side of the cur-
rent sense resistor and the sources of the low side synchronous
MOSFETS. These capacitors decouple the high frequency leading
edge current spike which supplies the reverse recovery charge of the
low side MOSFETS body diode. The exact number required is a
function of board layout. Typical designs will use two 10 F
MLC capacitors.
To reduce the input-current di/dt to below the recommended
maximum of 0.1 A/ s, an additional small inductor (L > 1 H
@ 15 A) should be inserted between the converter and the sup-
ply bus. That inductor also acts as a filter between the converter
and the primary power source.
65
IN
C RIPPLE
3
(
Selection and Input Current di/dt Reduction
A
I
65
C RMS
3
(
A
18
)
)
3
m
I
n
3 0 125
O
I
n
OUT
O
.
3 270
/V
ESR
n
n D
IN
C
C
and an amplitude of one-half of the
(
3 0 125
0 125
HSF
F
n
.
C
.
200
(
D
C
n D
HSF
IN
)
2
kHz
HSF
f
10 5
SW
.
)
2
147
A
mV
(25)
(26)