LTC1649CS#PBF Linear Technology, LTC1649CS#PBF Datasheet - Page 7

• Manufacturer Part Number: LTC1649CS#PBF
• Description: IC BUCK/SW CAP SYNC ADJ 16SOIC
• Manufacturer: Linear Technology
• Type: Step-Down (Buck), Switched Capacitor (Charge Pump)r

Specifications of LTC1649CS#PBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 1.26 ~ 2.5 V
• Current - Output: 20A
• Frequency - Switching: 200kHz
• Voltage - Input: 2.7 ~ 5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIONS
MOSFET Gate Drive
The LTC1649 is designed to operate from supplies as low
as 2.7V while using standard 5V logic-level N-channel
external MOSFETs. This poses somewhat of a challenge—
from as little as 2.7V, the LTC1649 must provide a 0V to
5V signal to the lower MOSFET, Q2, while the upper
MOSFET, Q1, requires a gate drive signal that swings from
0V to (V
with two specialized circuits. An onboard charge pump
boosts the input voltage at V
This 5V supply is used to power the PV
turn supplies 5V gate drive to Q2. This 5V supply is also
used to power the V
circuitry to interface to the boosted driver supplies.
Gate drive for the top N-channel MOSFET, Q1, is supplied
by PV
Conveniently, the switching node at the source of Q1 rises
to V
generate the required voltage at PV
external charge pump as shown in Figure 2. This circuit
charges the flying capacitor C2 to the 5V level at CP
when the switching node is low. As the top MOSFET turns
on, the switching node begins to rise to V
is pulled up to V
cycle (typical) means the switching node at the source of
Q1 will return to ground during at least 7% of each cycle,
ensuring that the charge pump will always provide ad-
equate gate drive to Q1.
+
IN
10 F
CC1
whenever Q1 is on. The LTC1649 uses this fact to
IN
. This supply must reach V
LTC1649
CP
+ 5V). The LTC1649 addresses this situation
OUT
Figure 2. PV
IN
PV
D
CC2
+ 5V by C2. The 93% maximum duty
CP
U
CC
pin, which allows the internal drive
PV
INFORMATION
CC1
U
CC1
G1
G2
IN
Charge Pump
to a regulated 5V at CP
1 F
IN
W
V
IN
+ 5V while Q1 is on.
CC1
Q1
Q2
CC2
IN
, and the PV
L1
with a simple
pin, which in
U
+
C
OUT
1649 F02
OUT
V
OUT
CC1
OUT
.
Synchronous Operation
The LTC1649 uses a synchronous switching architecture,
with MOSFET Q2 taking the place of the diode in a classic
buck circuit (Figure 3). This improves efficiency by reduc-
ing the voltage drop and the resultant power dissipation
across Q2 to V
than V
offsets the additional gate drive required by the second
MOSFET, allowing the LTC1649 to achieve efficiencies in
the mid-90% range for a wide range of load currents.
Another feature of the synchronous architecture is that
unlike a diode, Q2 can conduct current in either direction.
This allows the output of a typical LTC1649 circuit to sink
current as well as sourcing it while remaining in regula-
tion. The ability to sink current at the output allows the
LTC1649 to be used with reactive or other nonconventional
loads that may supply current to the regulator as well as
drawing current from it.
F
of the diode in the classical circuit. This more than
CONTROLLER
CONTROLLER
Figure 3b. Synchronous Buck Architecture
Figure 3a. Classical Buck Architecture
ON
= (I)(R
DS(ON)(Q2)
V
V
IN
IN
Q1
Q1
Q2
D1
), usually much lower
LTC1649
1649 F03b
1649 F03a
V
V
OUT
OUT
7